mvebu: add support for RB5009UG+S+IN

This patch adds support for Mikrotik RB5009UG+S+IN.

Specifications:
  - SoC: Marvell Armada 7040 (88F7040) - 4 cores, ARMv8 Cortex-A72, 1.4GHz, 64bit
  - RAM: 1024MB DDR4
  - Flash: 16MB SPI NOR flash, 1024MB NAND
  - Ethernet:
  	* Marvell 88E6393X - Amethyst:
  	* one 2.5G RJ45 port via Qualcomm QCA8081 PHY
  	* seven 1G RJ45 ports via built-in PHY-s
  	* one 10G SFP+ cage
  	* All ports share the same 10G switch uplink to the CPU
  - LED: User, SFP, Hdr1, Hdr2
  - Buttons: Reset
  - UART: 115200 8n1 on the MikroTik 16 pin header
  - USB: One USB3 port
  - Power: 24-57 V via
  	* DC jack
  	* 802.3af/at PoE on Ethernet 1
  	* 2-pin terminal on the side

16 Pin header pinout:
1   GND Vcc  RX  ?  GND
   #--------------------#
   |.-. .-. .-. .-. .-. |
   |'-' '-' '-' '-' '-' |
   |.-. .-. .-. .-. .-. |
   |'-' '-' '-' '-' '-' |
   #--------------------#
2   CLK  DO /CS  TX  DI

Do note that the default RouterBoot has disabled UART even when the
required hard-config bit is set to indicate UART support.
Patched RouterBoot must be used if UART is desired.

Also, since ARM64 Linux support does not support in any way appending the
DTB to the kernel image we use mainline U-Boot with added RB5009 support
in order to boot OpenWrt.
MikroTik uses YAFFS to store the boot kernel and we use YAFUT to put U-Boot
as the kernel which RouterBoot then simply boots as an ELF.

Install instructions:

NOTE: In case you are using an existing out of tree version of OpenWrt make
sure to reinstall RouterOS via Netinstall to return the expected partition
layout.

1. Prepare FAT or EXT4 formatted USB drive with OpenWrt initramfs:
* Copy bin/targets/mvebu/cortexa72/openwrt-mvebu-cortexa72-mikrotik_rb5009-initramfs-uImage.itb
to the root of FAT or EXT4 formatted USB drive.
* Plug in the drive to the RB5009 USB port

2. Boot the modified OpenWrt built U-Boot ELF:
u-boot.elf from bin/targets/mvebu/cortexa72/u-boot-rb5009/u-boot.elf

Consult OpenWrt wiki for common instructions on switching to boot from
Ethernet once as well as serving the file:
https://openwrt.org/toh/mikrotik/common

Once U-Boot is booted it will attempt to boot in the following order:
1. NAND
2. USB
3. Network

NAND is expected to fail but USB or Networking need to serve the OpenWrt
initramfs image and after booting it will be accessible from LAN ports
on the default 192.168.1.1 IP with default credentials.

3. Flash modified RouterBoot that enables UART (Optional but recommended):
https://public.robimarko.eu/RB5009/70x0-7.15-uart.fwf

* Copy the file over to the booted OpenWrt initramfs to /tmp
* Run: mtd erase RouterBOOT-primary
* Run: mtd write /tmp/70x0-7.15-uart.fwf RouterBOOT-primary

4. Install U-Boot to boot OpenWrt:
* Copy the u-boot.elf from bin/targets/mvebu/cortexa72/u-boot-rb5009/u-boot.elf
to OpenWrt initramfs to /tmp.
* Run: . /lib/functions.sh
* Run: yafut -d /dev/mtd$(find_mtd_index "YAFFS") -w -i /tmp/u-boot.elf -o kernel -T
This will use yafut to copy the U-Boot as kernel in YAFFS so that RouterBoot boots it.

5. Wipe the NAND UBI partition:
* Run: ubiformat /dev/mtd$(find_mtd_index "ubi") -y
This will prepare the existing RouterOS rootfs partition for OpenWrt.

6. Flash OpenWrt:
* Copy the bin/targets/mvebu/cortexa72/openwrt-mvebu-cortexa72-mikrotik_rb5009-squashfs-sysupgrade.bin
to OpenWrt initramfs to /tmp.
* Run: sysupgrade /tmp/openwrt-mvebu-cortexa72-mikrotik_rb5009-squashfs-sysupgrade.bin

Device will reboot, boot U-Boot and then OpenWrt.

Recovery:

In case you need to reinstall OpenWrt if it crashes after U-Boot, there is
a recovery mechanism in OpenWrt to boot the OpenWrt initramfs.
You need to hold the reset button while U-Boot is booting and then it will
boot the OpenWrt initramfs from:
1. USB
2. Networking

In recovery mode U-Boot will light all of the LED-s except for the switch
ones.

In case you want to return to RouterOS, you can simply do that via
Netinstall like on any other MikroTik board.

Credits also go to Serhii Serhieiev <adron@mstnt.com> who origininally
figured out the RouterBoot modification for UART, the missing 10G MVPP2
support in U-Boot as well as the custom aux loader to boot directly via
RouterBoot.

Link: https://github.com/openwrt/openwrt/pull/15765
Signed-off-by: Robert Marko <robimarko@gmail.com>

5 files changed, 417 insertions, 0 deletions

diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
index 93dadf491b..bd77be3d41 100644
--- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
@@ -32,6 +32,9 @@ marvell,armada7040-db)
 marvell,armada8040-clearfog-gt-8k)
 	ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 eth2" "eth0 eth1"
 	;;
+mikrotik,rb5009)
+	ucidef_set_interfaces_lan_wan "p2 p3 p4 p5 p6 p7 p8 sfp" "p1"
+	;;
 solidrun,clearfog-pro)
 	ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 eth0 eth1" "eth2"
 	;;
diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
index c7f20a6d7c..bb81b0ff26 100755
--- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
@@ -37,6 +37,9 @@ platform_do_upgrade() {
 	solidrun,clearfog-pro)
 		legacy_sdcard_do_upgrade "$1"
 		;;
+	mikrotik,rb5009)
+		nand_do_upgrade "$1"
+		;;
 	*)
 		default_do_upgrade "$1"
 		;;
diff --git a/target/linux/mvebu/cortexa72/config-6.6 b/target/linux/mvebu/cortexa72/config-6.6
index de2cec6f26..19ca2b29d1 100644
--- a/target/linux/mvebu/cortexa72/config-6.6
+++ b/target/linux/mvebu/cortexa72/config-6.6
@@ -102,6 +102,7 @@ CONFIG_QUEUED_SPINLOCKS=y
 CONFIG_RAS=y
 # CONFIG_RAVE_SP_CORE is not set
 CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_USERSPACE_CONSUMER=y
 # CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set
 CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON=y
 CONFIG_SERIAL_DEV_BUS=y
diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
new file mode 100644
index 0000000000..8cd744f64d
--- /dev/null
+++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "armada-7040.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "MikroTik RB5009";
+	compatible = "mikrotik,rb5009", "marvell,armada7040",
+		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x40000000>;
+	};
+
+	aliases {
+		led-boot = &led_user;
+		led-failsafe = &led_user;
+		led-running = &led_user;
+		led-upgrade = &led_user;
+	};
+
+	usb3_vbus: regulator-usb3-vbus0 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_leds: regulator-leds {
+		compatible = "regulator-fixed";
+		regulator-name = "LED-power";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&cp0_gpio2 27 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
+	output-led-power {
+		compatible = "regulator-output";
+		vout-supply = <&reg_leds>;
+	};
+
+	sfp_i2c: sfp-i2c {
+		compatible = "i2c-gpio";
+		sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_user: user {
+			label = "green:user";
+			gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
+		};
+
+		sfp {
+			label = "green:sfp";
+			gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
+		};
+
+		hdr1 {
+			label = "blue:hdr1";
+			gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
+		};
+
+		hdr2 {
+			label = "blue:hdr2";
+			gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	sfp: sfp {
+		compatible = "sff,sfp";
+		i2c-bus = <&sfp_i2c>;
+		mod-def0-gpios = <&cp0_gpio1 11 GPIO_ACTIVE_LOW>;
+		los-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_HIGH>;
+		tx-disable-gpios = <&cp0_gpio1 5 GPIO_ACTIVE_HIGH>;
+		rate-select0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-0 = <&uart0_pins>;
+	pinctrl-names = "default";
+};
+
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				compatible = "mikrotik,routerboot-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				label = "MikroTik";
+				reg = <0x0 0xfe0000>;
+
+				hard_config: hard_config {
+					read-only;
+
+					nvmem-layout {
+						compatible = "mikrotik,routerboot-nvmem";
+
+						macaddr_hard: base-mac-address {
+							#nvmem-cell-cells = <1>;
+						};
+					};
+				};
+
+				soft_config {
+				};
+
+				dtb_config {
+					read-only;
+				};
+			};
+
+			partition@b0000 {
+				label = "RouterBOOT-primary";
+				reg = <0xb0000 0x10000>;
+			};
+
+			/* Empty space on NOR repurposed for U-Boot environment */
+			partition@fe0000 {
+				compatible = "u-boot,env";
+				label = "u-boot-env";
+				reg = <0xfe0000 0x20000>;
+			};
+		};
+	};
+};
+
+&cp0_nand_controller {
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+		nand-rb = <0>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-on-flash-bbt;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "YAFFS";
+				reg = <0x0 0x800000>;
+			};
+
+			partition@800000 {
+				label = "ubi";
+				reg = <0x800000 0x3f800000>;
+			};
+		};
+	};
+};
+
+&cp0_utmi {
+	status = "okay";
+};
+
+&cp0_comphy3 {
+	connector {
+		compatible = "usb-a-connector";
+		phy-supply = <&usb3_vbus>;
+	};
+};
+
+&cp0_usb3_1 {
+	status = "okay";
+	phys = <&cp0_comphy3 1>, <&cp0_utmi1>;
+	phy-names = "cp0-usb3h1-comphy", "utmi";
+	dr_mode = "host";
+};
+
+&cp0_i2c0 {
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&cp0_mdio {
+	status = "okay";
+};
+
+&cp0_ethernet {
+	status = "okay";
+};
+
+&cp0_eth0 {
+	/* This port is connected to 88E6393X switch */
+	status = "okay";
+	phy-mode = "10gbase-r";
+	phys = <&cp0_comphy2 0>;
+	managed = "in-band-status";
+	nvmem-cells = <&macaddr_hard 0>;
+	nvmem-cell-names = "mac-address";
+};
+
+&cp0_mdio {
+	status = "okay";
+
+	switch@0 {
+		/* Actual device is MV88E6393X */
+		compatible = "marvell,mv88e6190";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		/* LED config is lost if switch is reset */
+		//reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				label = "cpu";
+				ethernet = <&cp0_eth0>;
+				phy-mode = "10gbase-r";
+				managed = "in-band-status";
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "p8";
+				phy-handle = <&switch0phy1>;
+				nvmem-cells = <&macaddr_hard 7>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "p7";
+				phy-handle = <&switch0phy2>;
+				nvmem-cells = <&macaddr_hard 6>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "p6";
+				phy-handle = <&switch0phy3>;
+				nvmem-cells = <&macaddr_hard 5>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "p5";
+				phy-handle = <&switch0phy4>;
+				nvmem-cells = <&macaddr_hard 4>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@5 {
+				reg = <5>;
+				label = "p4";
+				phy-handle = <&switch0phy5>;
+				nvmem-cells = <&macaddr_hard 3>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@6 {
+				reg = <6>;
+				label = "p3";
+				phy-handle = <&switch0phy6>;
+				nvmem-cells = <&macaddr_hard 2>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@7 {
+				reg = <7>;
+				label = "p2";
+				phy-handle = <&switch0phy7>;
+				nvmem-cells = <&macaddr_hard 1>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@9 {
+				reg = <9>;
+				label = "p1";
+				phy-mode = "sgmii";
+				phy-handle = <&qca8081>;
+				managed = "in-band-status";
+				nvmem-cells = <&macaddr_hard 0>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			port@a {
+				reg = <10>;
+				label = "sfp";
+				phy-mode = "10gbase-r";
+				managed = "in-band-status";
+				sfp = <&sfp>;
+				nvmem-cells = <&macaddr_hard 8>;
+				nvmem-cell-names = "mac-address";
+			};
+		};
+
+		mdio {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			switch0phy1: switch0phy1@1 {
+				reg = <0x1>;
+			};
+
+			switch0phy2: switch0phy2@2 {
+				reg = <0x2>;
+			};
+
+			switch0phy3: switch0phy3@3 {
+				reg = <0x3>;
+			};
+
+			switch0phy4: switch0phy4@4 {
+				reg = <0x4>;
+			};
+
+			switch0phy5: switch0phy5@5 {
+				reg = <0x5>;
+			};
+
+			switch0phy6: switch0phy6@6 {
+				reg = <0x6>;
+			};
+
+			switch0phy7: switch0phy7@7 {
+				reg = <0x7>;
+			};
+		};
+
+		mdio1 {
+			compatible = "marvell,mv88e6xxx-mdio-external";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			qca8081: qca8081@0 {
+				reg = <0>;
+			};
+		};
+	};
+};
diff --git a/target/linux/mvebu/image/cortexa72.mk b/target/linux/mvebu/image/cortexa72.mk
index 17904dc6c3..48919b7f71 100644
--- a/target/linux/mvebu/image/cortexa72.mk
+++ b/target/linux/mvebu/image/cortexa72.mk
@@ -1,3 +1,16 @@
+define Device/FitImage
+  KERNEL_SUFFIX := -uImage.itb
+  KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+  KERNEL_NAME := Image
+endef
+
+define Device/UbiFit
+  KERNEL_IN_UBI := 1
+  IMAGES := factory.ubi sysupgrade.bin
+  IMAGE/factory.ubi := append-ubi
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+endef
+
 define Device/globalscale_mochabin
   $(call Device/Default-arm64)
   DEVICE_VENDOR := Globalscale
@@ -52,6 +65,19 @@ define Device/marvell_macchiatobin-singleshot
 endef
 TARGET_DEVICES += marvell_macchiatobin-singleshot
 
+define Device/mikrotik_rb5009
+  $(call Device/Default-arm64)
+  $(Device/NAND-128K)
+  $(call Device/FitImage)
+  $(call Device/UbiFit)
+  DEVICE_VENDOR := MikroTik
+  DEVICE_MODEL := RB5009
+  SOC := armada-7040
+  KERNEL_LOADADDR := 0x22000000
+  DEVICE_PACKAGES += kmod-i2c-gpio yafut
+endef
+TARGET_DEVICES += mikrotik_rb5009
+
 define Device/marvell_clearfog-gt-8k
   $(call Device/Default-arm64)
   DEVICE_VENDOR := SolidRun