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| author | INAGAKI Hiroshi <musashino.open@gmail.com> | 2024-03-04 19:07:05 +0900 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2024-03-08 17:35:01 +0100 |
| commit | e0ee4195fc7b1a119cfb02bf292a9410af3b9fe4 (patch) | |
| tree | 7eb333430b52f385ea298669e731fda6154f1cac /target/linux/ath79 | |
| parent | 102009f3ea48a49114485fb119072850f40ae1e8 (diff) | |
| download | openwrt-e0ee4195fc7b1a119cfb02bf292a9410af3b9fe4.tar.gz openwrt-e0ee4195fc7b1a119cfb02bf292a9410af3b9fe4.tar.bz2 openwrt-e0ee4195fc7b1a119cfb02bf292a9410af3b9fe4.zip | |
ath79: rename label of primary UART on QCA955x to "uart0"
Rename the DT label of the primary UART on Qualcomm Atheros QCA955x
series SoCs to "uart0" from "uart" for the preparation to add HighSpeed
UART (uart1) support.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Diffstat (limited to 'target/linux/ath79')
| -rw-r--r-- | target/linux/ath79/dts/qca955x.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ath79/dts/qca955x.dtsi b/target/linux/ath79/dts/qca955x.dtsi index c17a15c55e..13fbd03ccb 100644 --- a/target/linux/ath79/dts/qca955x.dtsi +++ b/target/linux/ath79/dts/qca955x.dtsi @@ -41,7 +41,7 @@ #qca,ddr-wb-channel-cells = <1>; }; - uart: uart@18020000 { + uart0: uart@18020000 { compatible = "ns16550a"; reg = <0x18020000 0x20>; |