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author | Daniel Golle <daniel@makrotopia.org> | 2023-08-26 02:19:18 +0100 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2023-08-28 16:35:22 +0100 |
commit | f631c7bbb16f1d39d59c4cdf3f7189abab4fd9c6 (patch) | |
tree | 49bc83ed6ac8c835fe18f201654236c7bca0aa70 /target/linux/ipq40xx | |
parent | a0f4eadf6a25fb54c189bde91425673e11125d35 (diff) | |
download | openwrt-f631c7bbb16f1d39d59c4cdf3f7189abab4fd9c6.tar.gz openwrt-f631c7bbb16f1d39d59c4cdf3f7189abab4fd9c6.tar.bz2 openwrt-f631c7bbb16f1d39d59c4cdf3f7189abab4fd9c6.zip |
generic: sync MediaTek Ethernet driver with upstream
Import commits from upstream Linux replacing some downstream patches.
Move accepted patches from pending-{5.15,6.1} to backport-{5.15,6.1}.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/ipq40xx')
-rw-r--r-- | target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch index 7fbf38a7e3..ed5b7b60fb 100644 --- a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch +++ b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch @@ -32,7 +32,7 @@ Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> - rev-mii --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -366,6 +366,7 @@ void phylink_get_linkmodes(unsigned long +@@ -371,6 +371,7 @@ void phylink_get_linkmodes(unsigned long case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII: @@ -40,7 +40,7 @@ Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_GMII: -@@ -629,6 +630,7 @@ static int phylink_parse_mode(struct phy +@@ -634,6 +635,7 @@ static int phylink_parse_mode(struct phy switch (pl->link_config.interface) { case PHY_INTERFACE_MODE_SGMII: |