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authorPatryk Kowalczyk <patryk@kowalczyk.ws>2023-09-16 03:02:35 +0200
committerDavid Bauer <mail@david-bauer.net>2023-10-31 21:12:15 +0100
commitd522ccecb28f941aadcaf7a50cd6daa861f468a7 (patch)
tree5044745c0f0825b5f1666fe489e4ea9549ee98aa /target/linux/mediatek/dts
parent2d314984b1cf87baf497b1161fed480dc9947f1c (diff)
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filogic: add support for ASUS TUF AX6000
Hardware ======== SOC: MediaTek MT7986 RAM: 512MB DDR3 FLASH: 256MB SPI-NAND WIFI: Mediatek MT7986 DBDC 802.11ax 2.4/5 GHz 4T4R ETH: MediaTek MT7530 Switch (LAN) MaxLinear GPY211C 2.5 N-Base-T PHY (WAN) MaxLinear GPY211C 2.5 N-Base-T PHY (LAN) UART: 3V3 115200 8N1 (Do not connect VCC) USB 3.1 Installation ============ Download the OpenWrt initramfs image. Copy the image to a TFTP server reachable at 192.168.1.70/24. Rename the image to TUF-AX6000.bin. Connect to the serial console, interrupt the auto boot process by pressing '4' when prompted or press '1' and set client IP, server IP and name of the image. yOU don't need to open the case or even soldering anything. use three goldpin wires, remove their plastic cover and connect them to the console pinout via the case holes. You can see three holes From Bottom: RX, TX, Ground - partially covered Download & Boot the OpenWrt initramfs image. In case of option '4' $ setenv ipaddr 192.168.1.1 $ setenv serverip 192.168.1.70 $ tftpboot 0x46000000 TUF-AX6000.bin $ bootm 0x46000000 In case of option '1' 1: Load System code to SDRAM via TFTP. Please Input new ones /or Ctrl-C to discard Input device IP (192.168.1.1) ==: Input server IP (192.168.1.70) ==: Input Linux Kernel filename (TUF-AX6000.trx) ==: Wait for OpenWrt to boot. Transfer the sysupgrade image to the device using scp and install using sysupgrade. $ sysupgrade -n <path-to-sysupgrade.bin> Missing features ================ 2.5Gb LAN port LED is ON during boot or when the LAN cable is disconnected The cover yellow light is not supported. (only blue one) Signed-off-by: Patryk Kowalczyk <patryk@kowalczyk.ws>
Diffstat (limited to 'target/linux/mediatek/dts')
-rw-r--r--target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts382
1 files changed, 382 insertions, 0 deletions
diff --git a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts
new file mode 100644
index 0000000000..2e9114f99c
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts
@@ -0,0 +1,382 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+#include "mt7986a.dtsi"
+
+/ {
+ model = "ASUS TUF-AX6000";
+ compatible = "asus,tuf-ax6000", "mediatek,mt7986a";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_system;
+ led-failsafe = &led_system;
+ led-running = &led_system;
+ led-upgrade = &led_system;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs-override = "ubi.mtd=UBI_DEV";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x20000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ mesh {
+ label = "wps";
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ label = "white:wlan";
+ gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ led_system: system {
+ label = "white:system";
+ gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan-red {
+ label = "red:wan";
+ gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+ };
+
+ cover-blue {
+ label = "blue:cover";
+ gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&eth {
+ status = "okay";
+
+ gmac0: mac@0 {
+ /* LAN */
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ /* WAN */
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "2500base-x";
+ phy-handle = <&phy6>;
+ };
+
+ mdio: mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};
+
+&mdio {
+ reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <50000>;
+ reset-post-delay-us = <20000>;
+
+ phy5: phy@5 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <5>;
+
+ mxl,led-config = <0x03f0 0x0 0x0 0x0>;
+ };
+
+ phy6: phy@6 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <6>;
+
+ /* LED0: CONN (WAN white) */
+ mxl,led-config = <0x03f0 0x0 0x0 0x0>;
+ };
+
+ switch: switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <10000>;
+ };
+};
+
+&pio {
+ spi_flash_pins: spi-flash-pins-33-to-38 {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <8>;
+ mediatek,pull-up-adv = <0>; /* bias-disable */
+ };
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <8>;
+ mediatek,pull-down-adv = <0>; /* bias-disable */
+ };
+ };
+
+ wf_2g_5g_pins: wf_2g_5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+
+ spi_nand_flash: flash@0 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions: partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bootloader";
+ reg = <0x0 0x400000>;
+ read-only;
+ };
+
+ partition@400000 {
+ label = "UBI_DEV";
+ reg = <0x400000 0xfc00000>;
+ };
+ };
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <4>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <1>;
+ label = "lan4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan5";
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy@1 {
+ reg = <1>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ phy@2 {
+ reg = <2>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ phy@3 {
+ reg = <3>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ phy@4 {
+ reg = <4>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+};
+
+&trng {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&ssusb {
+ vusb33-supply = <&reg_3p3v>;
+ vbus-supply = <&reg_5v>;
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+}; \ No newline at end of file