summaryrefslogtreecommitdiffstats
path: root/target/linux/realtek
diff options
context:
space:
mode:
authorTobias Schramm <tobias@t-sys.eu>2023-12-23 13:41:01 +0100
committerDavid Bauer <mail@david-bauer.net>2023-12-24 01:36:39 +0100
commit8b706d9297ed9aa9ba15e759bfacf207640e43ad (patch)
treec0e2af4367a6c006325d6702b410e0d5d42715c7 /target/linux/realtek
parent8de4cc77a6d5c25e48566d0203f159287ac7f3fe (diff)
downloadopenwrt-8b706d9297ed9aa9ba15e759bfacf207640e43ad.tar.gz
openwrt-8b706d9297ed9aa9ba15e759bfacf207640e43ad.tar.bz2
openwrt-8b706d9297ed9aa9ba15e759bfacf207640e43ad.zip
realtek: 5.15: rtl93xx: support 100BASE-T and 10BASE-T MAC modes
The MAC embedded in rtl93xx switch SoCs needs different mac mode bits set to support 10BaseT and 100BaseT link modes. Set them accordingly. This change has been tested on a ZyXEL XGS1250-12. Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
Diffstat (limited to 'target/linux/realtek')
-rw-r--r--target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
index 063ce9b8c5..d246e60cb2 100644
--- a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
+++ b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
@@ -854,8 +854,11 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port,
case SPEED_1000:
reg |= 2 << 3;
break;
+ case SPEED_100:
+ reg |= 1 << 3;
+ break;
default:
- reg |= 2 << 3;
+ /* Also covers 10M */
break;
}