sunxi: add support for Bananapi P2 Zero

CPU:     Allwinner H2+ quad-core Cortex-A7 @ 1.2GHz
Memory:  512Mb DDR3
Storage: SDcard, 8GB eMMC
Network: 10/100M ethernet, optional PoE support, Ampak AP6212 wifi + BT
USB:     1x USB 2.0 OTG
Other:   40-pin expansion header, mini-HDMI

Flashing instructions:
  Standard sunxi SD card installation procedure - copy image to SD card,
  insert into SD card slot on the device and boot.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

2 files changed, 301 insertions, 0 deletions

diff --git a/target/linux/sunxi/image/cortexa7.mk b/target/linux/sunxi/image/cortexa7.mk
index e14db24eb2..3191cec4fd 100644
--- a/target/linux/sunxi/image/cortexa7.mk
+++ b/target/linux/sunxi/image/cortexa7.mk
@@ -186,6 +186,15 @@ define Device/sinovoip_bananapi-m3
 endef
 TARGET_DEVICES += sinovoip_bananapi-m3
 
+define Device/sinovoip_bananapi-p2-zero
+  DEVICE_VENDOR := Sinovoip
+  DEVICE_MODEL := Banana Pi P2 Zero
+  DEVICE_PACKAGES:=kmod-leds-gpio kmod-brcmfmac \
+	cypress-firmware-43430-sdio wpad-basic-mbedtls
+  SOC := sun8i-h2-plus
+endef
+TARGET_DEVICES += sinovoip_bananapi-p2-zero
+
 define Device/xunlong_orangepi-one
   DEVICE_VENDOR := Xunlong
   DEVICE_MODEL := Orange Pi One
diff --git a/target/linux/sunxi/patches-6.1/410-sunxi-add-bananapi-p2-zero.patch b/target/linux/sunxi/patches-6.1/410-sunxi-add-bananapi-p2-zero.patch
new file mode 100644
index 0000000000..3bc55b8cfc
--- /dev/null
+++ b/target/linux/sunxi/patches-6.1/410-sunxi-add-bananapi-p2-zero.patch
@@ -0,0 +1,292 @@
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1348,6 +1348,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
+ 	sun8i-a83t-cubietruck-plus.dtb \
+ 	sun8i-a83t-tbs-a711.dtb \
+ 	sun8i-h2-plus-bananapi-m2-zero.dtb \
++	sun8i-h2-plus-bananapi-p2-zero.dtb \
+ 	sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ 	sun8i-h2-plus-orangepi-r1.dtb \
+ 	sun8i-h2-plus-orangepi-zero.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-p2-zero.dts
+@@ -0,0 +1,279 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (C) 2023 Zoltan HERPAI <wigyori@uid0.hu>
++ *
++ * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is:
++ *   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
++ */
++
++/dts-v1/;
++#include "sun8i-h3.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++
++/ {
++	model = "Banana Pi BPI-P2-Zero";
++	compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";
++
++	aliases {
++		serial0 = &uart0;
++		serial1 = &uart1;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	connector {
++		compatible = "hdmi-connector";
++		type = "c";
++
++		port {
++			hdmi_con_in: endpoint {
++				remote-endpoint = <&hdmi_out_con>;
++			};
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		pwr_led {
++			label = "bananapi-p2-zero:red:pwr";
++			gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
++			default-state = "on";
++		};
++	};
++
++	gpio_keys {
++		compatible = "gpio-keys";
++
++		sw4 {
++			label = "power";
++			linux,code = <BTN_0>;
++			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	reg_vdd_cpux: vdd-cpux-regulator {
++		compatible = "regulator-gpio";
++		regulator-name = "vdd-cpux";
++		regulator-type = "voltage";
++		regulator-boot-on;
++		regulator-always-on;
++		regulator-min-microvolt = <1100000>;
++		regulator-max-microvolt = <1300000>;
++		regulator-ramp-delay = <50>; /* 4ms */
++
++		gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
++		enable-active-high;
++		gpios-states = <0x1>;
++		states = <1100000 0>, <1300000 1>;
++	};
++
++	reg_vcc_dram: vcc-dram {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-dram";
++		regulator-min-microvolt = <1500000>;
++		regulator-max-microvolt = <1500000>;
++		regulator-always-on;
++		regulator-boot-on;
++		enable-active-high;
++		gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
++		vin-supply = <&reg_vcc5v0>;
++	};
++
++	reg_vcc1v2: vcc1v2 {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc1v2";
++		regulator-min-microvolt = <1200000>;
++		regulator-max-microvolt = <1200000>;
++		regulator-always-on;
++		regulator-boot-on;
++		enable-active-high;
++		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
++		vin-supply = <&reg_vcc5v0>;
++	};
++
++	poweroff {
++		compatible = "regulator-poweroff";
++		cpu-supply = <&reg_vcc1v2>;
++	};
++
++	wifi_pwrseq: wifi_pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
++		clocks = <&rtc 1>;
++		clock-names = "ext_clock";
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_vdd_cpux>;
++};
++
++&de {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
++&hdmi {
++	status = "okay";
++};
++
++&hdmi_out {
++	hdmi_out_con: endpoint {
++		remote-endpoint = <&hdmi_con_in>;
++	};
++};
++
++&mmc0 {
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	/*
++	 * On the production batch of this board the card detect GPIO is
++	 * high active (card inserted), although on the early samples it's
++	 * low active.
++	 */
++	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
++	status = "okay";
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc3v3>;
++	vqmmc-supply = <&reg_vcc3v3>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++
++	brcmf: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		interrupt-parent = <&pio>;
++		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
++		interrupt-names = "host-wake";
++	};
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pa_pins>;
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
++	uart-has-rtscts;
++	status = "okay";
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		max-speed = <1500000>;
++		clocks = <&rtc 1>;
++		clock-names = "lpo";
++		vbat-supply = <&reg_vcc3v3>;
++		vddio-supply = <&reg_vcc3v3>;
++		device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
++		host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
++		shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
++	};
++
++};
++
++&pio {
++	gpio-line-names =
++		/* PA */
++		"CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15",
++			"CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29",
++		"CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05",
++			"CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16",
++		"CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27",
++			"CON2-P40", "CON2-P38", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PB */
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PC */
++		"CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24",
++			"CON2-P18", "", "", "CON2-P26",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PD */
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "CSI-PWR-EN", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PE */
++		"CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07",
++			"CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20",
++		"CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12",
++			"CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PF */
++		"SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
++			"SDC0-D2", "SDC0-DET", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++
++		/* PG */
++		"WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
++			"WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX",
++		"BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP",
++			"BT-RST-N", "AP-WAKE-BT", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "";
++};
++
++&r_pio {
++	gpio-line-names =
++		/* PL */
++		"", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36",
++			"VCC-IO-EN", "USB0-ID", "WL-PWR-EN",
++		"PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "";
++};
++
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usbphy {
++	usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
++	/*
++	 * There're two micro-USB connectors, one is power-only and another is
++	 * OTG. The Vbus of these two connectors are connected together, so
++	 * the external USB device will be powered just by the power input
++	 * from the power-only USB port.
++	 */
++	status = "okay";
++};