diff options
| author | Paul Fertser <fercerpav@gmail.com> | 2021-09-20 20:13:35 +0300 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-09-25 19:28:54 +0200 |
| commit | 16ae56b4f9ec54b4cc4d381be7f7c327c00ddc4c (patch) | |
| tree | 6b2610ba56675a110ea928e4b8b6620d0320642e /target/linux | |
| parent | 8ea0d08e0e9bc6ea4128048ee0ff90a775581934 (diff) | |
| download | openwrt-16ae56b4f9ec54b4cc4d381be7f7c327c00ddc4c.tar.gz openwrt-16ae56b4f9ec54b4cc4d381be7f7c327c00ddc4c.tar.bz2 openwrt-16ae56b4f9ec54b4cc4d381be7f7c327c00ddc4c.zip | |
realtek: fix RTL8231 gpio expander for high GPIOs
GPIOs > 31 require special handling. This patch fixes both the
initialisation and direction get/set operations.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Sander Vanheule <sander@svanheule.net>
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c index 031f60f530..a8ffcdc313 100644 --- a/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c +++ b/target/linux/realtek/files-5.4/drivers/gpio/gpio-rtl8231.c @@ -106,12 +106,11 @@ static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir) u32 v; int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio); int pin_dir_addr = RTL8231_GPIO_DIR(gpio); - int pin = gpio % 16; - int dpin = pin; + int dpin = gpio % 16; if (gpio > 31) { pr_debug("WARNING: HIGH pin\n"); - dpin = pin << 5; + dpin += 5; pin_dir_addr = pin_sel_addr; } @@ -140,7 +139,7 @@ static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir) if (gpio > 31) { pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio); - pin = pin << 5; + pin += 5; } v = rtl8231_read(gpios, pin_dir_addr); @@ -240,6 +239,8 @@ void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) int rtl8231_init(struct rtl8231_gpios *gpios) { + u32 v; + pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id); gpios->reg_cached = 0; @@ -253,9 +254,11 @@ int rtl8231_init(struct rtl8231_gpios *gpios) sw_w32_mask(3, 1, RTL838X_DMY_REG5); } - /*Select GPIO functionality for pins 0-15, 16-31 and 32-37 */ + /* Select GPIO functionality for pins 0-34 */ rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff); rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff); + v = rtl8231_read(gpios, RTL8231_GPIO_PIN_SEL(32)); + rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), v | 0x7); return 0; } |