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authorRobert Marko <robert.marko@sartura.hr>2024-03-23 20:03:34 +0100
committerRobert Marko <robert.marko@sartura.hr>2024-04-11 13:25:11 +0200
commit923d7c553137d4a80aba230c2bd4744ddeb08359 (patch)
treee52b475f959028571477b16884b8273d2d727b7c /target
parent2dba4308d10d638d3da6ca354d82e3e469865ed5 (diff)
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mediatek: filogic: add support for Edgecore EAP111
HW specifications: * Mediatek MT7981A * 256MB SPI-NAND * 512MB DRAM * Uplink: 1 x 10/100/1000Base-T Ethernet, Auto MDIX, RJ-45 with 802.3at PoE (Built-in GBe PHY) * LAN: 1 x 10/100/1000Base-T Ethernet, Auto MDIX, RJ-45 (Airoha EN8801SC) * 1 Tricolor LED * Reset button * 12V/2.0A DC input Installation: Board comes with OpenWifi/TIP which is OpenWrt based, so sysupgrade can be used directly over SSH. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Diffstat (limited to 'target')
-rw-r--r--target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts201
-rw-r--r--target/linux/mediatek/filogic/base-files/etc/board.d/02_network3
-rw-r--r--target/linux/mediatek/filogic/config-6.12
-rw-r--r--target/linux/mediatek/filogic/config-6.62
-rw-r--r--target/linux/mediatek/image/filogic.mk18
5 files changed, 223 insertions, 3 deletions
diff --git a/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts b/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts
new file mode 100644
index 0000000000..c306a5eb7b
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "mt7981.dtsi"
+
+/ {
+ model = "Edgecore EAP111";
+ compatible = "edgecore,eap111", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_green;
+ led-failsafe = &led_green;
+ led-running = &led_green;
+ led-upgrade = &led_green;
+ };
+
+ chosen {
+ bootargs-override = "console=ttyS0,115200n8";
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_green: led-green {
+ gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ };
+
+ led_orange: led-orange {
+ gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_ORANGE>;
+ function = LED_FUNCTION_INDICATOR;
+ };
+
+ led_blue: led-blue {
+ gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_INDICATOR;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ cs-gpios = <0>, <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <7>;
+ spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+ spi-cal-addrlen = <5>;
+ spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x00000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@180000 {
+ label = "Factory";
+ reg = <0x180000 0x200000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory: eeprom@0 {
+ reg = <0x0 0x1000>;
+ };
+
+ macaddr_wan: macaddr@2a {
+ reg = <0x2a 0x6>;
+ };
+
+ macaddr_lan: macaddr@24 {
+ reg = <0x24 0x6>;
+ };
+ };
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x200000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x4000000>;
+ compatible = "linux,ubi";
+ };
+ };
+ };
+};
+
+&mdio_bus {
+ reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <10000>;
+
+ en8801sc: ethernet-phy@24 {
+ reg = <24>;
+ compatible = "ethernet-phy-id03a2.9471";
+ phy-mode = "sgmii";
+ };
+};
+
+&eth {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "sgmii";
+ phy-handle = <&en8801sc>;
+ managed = "in-band-status";
+ nvmem-cells = <&macaddr_lan>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ nvmem-cells = <&macaddr_wan>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
+&wifi {
+ nvmem-cells = <&eeprom_factory>;
+ nvmem-cell-names = "eeprom";
+ status = "okay";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 8b6504fa1c..51e02efb39 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -37,7 +37,8 @@ mediatek_setup_interfaces()
bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
- bananapi,bpi-r3-mini)
+ bananapi,bpi-r3-mini|\
+ edgecore,eap111)
ucidef_set_interfaces_lan_wan eth0 eth1
;;
bananapi,bpi-r4)
diff --git a/target/linux/mediatek/filogic/config-6.1 b/target/linux/mediatek/filogic/config-6.1
index ce6a2f8ddf..663bb054a2 100644
--- a/target/linux/mediatek/filogic/config-6.1
+++ b/target/linux/mediatek/filogic/config-6.1
@@ -1,6 +1,6 @@
CONFIG_64BIT=y
# CONFIG_AHCI_MTK is not set
-# CONFIG_AIROHA_EN8801SC_PHY is not set
+CONFIG_AIROHA_EN8801SC_PHY=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
diff --git a/target/linux/mediatek/filogic/config-6.6 b/target/linux/mediatek/filogic/config-6.6
index a87fdc9bc8..110f6e7550 100644
--- a/target/linux/mediatek/filogic/config-6.6
+++ b/target/linux/mediatek/filogic/config-6.6
@@ -1,6 +1,6 @@
CONFIG_64BIT=y
# CONFIG_AHCI_MTK is not set
-# CONFIG_AIROHA_EN8801SC_PHY is not set
+CONFIG_AIROHA_EN8801SC_PHY=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 818a7cef95..f99a73ac74 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -506,6 +506,24 @@ define Device/dlink_aquila-pro-ai-m30-a1
endef
TARGET_DEVICES += dlink_aquila-pro-ai-m30-a1
+define Device/edgecore_eap111
+ DEVICE_VENDOR := Edgecore
+ DEVICE_MODEL := EAP111
+ DEVICE_DTS := mt7981a-edgecore-eap111
+ DEVICE_DTS_DIR := ../dts
+ DEVICE_DTS_LOADADDR := 0x47000000
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ UBINIZE_OPTS := -E 5
+ KERNEL_IN_UBI := 1
+ IMAGE_SIZE := 65536k
+ IMAGES := sysupgrade.bin factory.bin
+ IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
+endef
+TARGET_DEVICES += edgecore_eap111
+
define Device/glinet_gl-mt2500
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-MT2500