summaryrefslogtreecommitdiffstats
path: root/target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch')
-rw-r--r--target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch39
1 files changed, 0 insertions, 39 deletions
diff --git a/target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch b/target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch
deleted file mode 100644
index b08676253e..0000000000
--- a/target/linux/bcm27xx/patches-6.1/950-0847-PCI-brcmstb-Wait-for-100ms-following-PERST-deassert.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 6f634d7efb8876e5953c30c0a613aaa5f575fe05 Mon Sep 17 00:00:00 2001
-From: Jim Quinlan <jim2101024@gmail.com>
-Date: Tue, 11 Oct 2022 14:42:07 -0400
-Subject: [PATCH] PCI: brcmstb: Wait for 100ms following PERST# deassert
-
-commit 3ae140ad827b359bc4fa7c7985691c4c1e3ca8f4 upstream.
-
-Be prudent and give some time for power and clocks to become stable. As
-described in the PCIe CEM specification sections 2.2 and 2.2.1; as well as
-PCIe r5.0, 6.6.1.
-
-Link: https://lore.kernel.org/r/20221011184211.18128-3-jim2101024@gmail.com
-Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
-Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
----
- drivers/pci/controller/pcie-brcmstb.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/controller/pcie-brcmstb.c
-+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -1038,8 +1038,15 @@ static int brcm_pcie_start_link(struct b
- pcie->perst_set(pcie, 0);
-
- /*
-- * Give the RC/EP time to wake up, before trying to configure RC.
-- * Intermittently check status for link-up, up to a total of 100ms.
-+ * Wait for 100ms after PERST# deassertion; see PCIe CEM specification
-+ * sections 2.2, PCIe r5.0, 6.6.1.
-+ */
-+ msleep(100);
-+
-+ /*
-+ * Give the RC/EP even more time to wake up, before trying to
-+ * configure RC. Intermittently check status for link-up, up to a
-+ * total of 100ms.
- */
- for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
- msleep(5);