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Diffstat (limited to 'target/linux/bcm27xx/patches-6.1/950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch')
-rw-r--r--target/linux/bcm27xx/patches-6.1/950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch475
1 files changed, 475 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-6.1/950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch b/target/linux/bcm27xx/patches-6.1/950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch
new file mode 100644
index 0000000000..f832fc1ed5
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.1/950-0972-drm-vc4-txp-Add-a-new-TXP-encoder-type.patch
@@ -0,0 +1,475 @@
+From 68a00ca7b1d7809ac7be736c02238c142e629127 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Thu, 27 Apr 2023 11:49:28 +0200
+Subject: [PATCH] drm/vc4: txp: Add a new TXP encoder type
+
+Starting with BCM2712, we'll have a two TXP. Let's follow the HDMI
+example and add two encoder types for TXP: TXP0 and TXP1.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/tests/vc4_mock.c | 4 +-
+ .../gpu/drm/vc4/tests/vc4_test_pv_muxing.c | 106 +++++++++---------
+ drivers/gpu/drm/vc4/vc4_drv.h | 3 +-
+ drivers/gpu/drm/vc4/vc4_kms.c | 2 +-
+ drivers/gpu/drm/vc4/vc4_txp.c | 2 +-
+ 5 files changed, 59 insertions(+), 58 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/tests/vc4_mock.c
++++ b/drivers/gpu/drm/vc4/tests/vc4_mock.c
+@@ -52,7 +52,7 @@ struct vc4_mock_desc {
+ static const struct vc4_mock_desc vc4_mock =
+ VC4_MOCK_DESC(
+ VC4_MOCK_CRTC_DESC(&bcm2835_txp_data.base,
+- VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP,
++ VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP0,
+ DRM_MODE_ENCODER_VIRTUAL,
+ DRM_MODE_CONNECTOR_WRITEBACK)),
+ VC4_MOCK_PIXELVALVE_DESC(&bcm2835_pv0_data,
+@@ -78,7 +78,7 @@ static const struct vc4_mock_desc vc4_mo
+ static const struct vc4_mock_desc vc5_mock =
+ VC4_MOCK_DESC(
+ VC4_MOCK_CRTC_DESC(&bcm2835_txp_data.base,
+- VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP,
++ VC4_MOCK_OUTPUT_DESC(VC4_ENCODER_TYPE_TXP0,
+ DRM_MODE_ENCODER_VIRTUAL,
+ DRM_MODE_CONNECTOR_WRITEBACK)),
+ VC4_MOCK_PIXELVALVE_DESC(&bcm2711_pv0_data,
+--- a/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
++++ b/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c
+@@ -91,7 +91,7 @@ static const struct encoder_constraint v
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 1),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
+- ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP, 2),
++ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 2),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 2),
+ };
+
+@@ -99,7 +99,7 @@ static const struct encoder_constraint v
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DPI, 0),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI0, 0),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_VEC, 1),
+- ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP, 0, 2),
++ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_TXP0, 0, 2),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_DSI1, 0, 1, 2),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI0, 0, 1, 2),
+ ENCODER_CONSTRAINT(VC4_ENCODER_TYPE_HDMI1, 0, 1, 2),
+@@ -208,7 +208,7 @@ static const struct pv_muxing_param vc4_
+ VC4_PV_MUXING_TEST("1 output: DSI1",
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("1 output: TXP",
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("2 outputs: DSI0, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_HDMI0),
+@@ -220,7 +220,7 @@ static const struct pv_muxing_param vc4_
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("2 outputs: DSI0, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("2 outputs: DPI, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_HDMI0),
+@@ -232,19 +232,19 @@ static const struct pv_muxing_param vc4_
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("2 outputs: DPI, TXP",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("2 outputs: HDMI0, DSI1",
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("2 outputs: HDMI0, TXP",
+ VC4_ENCODER_TYPE_HDMI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("2 outputs: VEC, DSI1",
+ VC4_ENCODER_TYPE_VEC,
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("2 outputs: VEC, TXP",
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("3 outputs: DSI0, HDMI0, DSI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_HDMI0,
+@@ -252,7 +252,7 @@ static const struct pv_muxing_param vc4_
+ VC4_PV_MUXING_TEST("3 outputs: DSI0, HDMI0, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_HDMI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("3 outputs: DSI0, VEC, DSI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+@@ -260,7 +260,7 @@ static const struct pv_muxing_param vc4_
+ VC4_PV_MUXING_TEST("3 outputs: DSI0, VEC, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("3 outputs: DPI, HDMI0, DSI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_HDMI0,
+@@ -268,7 +268,7 @@ static const struct pv_muxing_param vc4_
+ VC4_PV_MUXING_TEST("3 outputs: DPI, HDMI0, TXP",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_HDMI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("3 outputs: DPI, VEC, DSI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+@@ -276,7 +276,7 @@ static const struct pv_muxing_param vc4_
+ VC4_PV_MUXING_TEST("3 outputs: DPI, VEC, TXP",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ };
+
+ KUNIT_ARRAY_PARAM(vc4_test_pv_muxing,
+@@ -288,7 +288,7 @@ static const struct pv_muxing_param vc4_
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_DSI0),
+ VC4_PV_MUXING_TEST("TXP/DSI1 Conflict",
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC4_PV_MUXING_TEST("HDMI0/VEC Conflict",
+ VC4_ENCODER_TYPE_HDMI0,
+@@ -297,22 +297,22 @@ static const struct pv_muxing_param vc4_
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_DSI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+ VC4_ENCODER_TYPE_DSI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("More than 3 outputs: DPI, HDMI0, DSI1, TXP",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_DSI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC4_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, TXP",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+ VC4_ENCODER_TYPE_DSI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ };
+
+ KUNIT_ARRAY_PARAM(vc4_test_pv_muxing_invalid,
+@@ -343,7 +343,7 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("2 outputs: DPI, TXP",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("2 outputs: DPI, VEC",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC),
+@@ -361,7 +361,7 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("2 outputs: DSI0, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("2 outputs: DSI0, VEC",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC),
+@@ -373,7 +373,7 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_VEC),
+ VC5_PV_MUXING_TEST("2 outputs: DSI1, TXP",
+ VC4_ENCODER_TYPE_DSI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("2 outputs: DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0),
+@@ -385,7 +385,7 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_VEC),
+ VC5_PV_MUXING_TEST("2 outputs: HDMI0, TXP",
+ VC4_ENCODER_TYPE_HDMI0,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("2 outputs: HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+@@ -394,14 +394,14 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_VEC),
+ VC5_PV_MUXING_TEST("2 outputs: HDMI1, TXP",
+ VC4_ENCODER_TYPE_HDMI1,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("2 outputs: TXP, VEC",
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_VEC),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, VEC, TXP",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, VEC, DSI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+@@ -416,15 +416,15 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, DSI1",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, TXP, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("3 outputs: DPI, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+@@ -441,7 +441,7 @@ static const struct pv_muxing_param vc5_
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, VEC, TXP",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP),
++ VC4_ENCODER_TYPE_TXP0),
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, VEC, DSI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+@@ -456,15 +456,15 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, DSI1",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, TXP, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("3 outputs: DSI0, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+@@ -491,17 +491,17 @@ static const struct pv_muxing_param vc5_
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+@@ -520,17 +520,17 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, DSI1, HDMI0, HDMI1",
+@@ -541,19 +541,19 @@ static const struct pv_muxing_param vc5_
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, DSI1, HDMI0, HDMI1",
+@@ -564,24 +564,24 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, TXP, DSI1, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+@@ -600,17 +600,17 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, DSI1, HDMI0, HDMI1",
+@@ -621,19 +621,19 @@ static const struct pv_muxing_param vc5_
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI0",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, DSI1, HDMI0, HDMI1",
+@@ -644,27 +644,27 @@ static const struct pv_muxing_param vc5_
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, TXP, DSI1, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: VEC, TXP, DSI1, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DPI, VEC, TXP, DSI1, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DPI,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+ VC5_PV_MUXING_TEST("More than 3 outputs: DSI0, VEC, TXP, DSI1, HDMI0, HDMI1",
+ VC4_ENCODER_TYPE_DSI0,
+ VC4_ENCODER_TYPE_VEC,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_HDMI0,
+ VC4_ENCODER_TYPE_HDMI1),
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -511,7 +511,8 @@ enum vc4_encoder_type {
+ VC4_ENCODER_TYPE_DSI1,
+ VC4_ENCODER_TYPE_SMI,
+ VC4_ENCODER_TYPE_DPI,
+- VC4_ENCODER_TYPE_TXP,
++ VC4_ENCODER_TYPE_TXP0,
++ VC4_ENCODER_TYPE_TXP1,
+ };
+
+ struct vc4_encoder {
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -359,7 +359,7 @@ static void vc6_hvs_pv_muxing_commit(str
+ mux = 0;
+ break;
+
+- case VC4_ENCODER_TYPE_TXP:
++ case VC4_ENCODER_TYPE_TXP0:
+ mux = 2;
+ break;
+
+--- a/drivers/gpu/drm/vc4/vc4_txp.c
++++ b/drivers/gpu/drm/vc4/vc4_txp.c
+@@ -517,7 +517,7 @@ const struct vc4_txp_data bcm2835_txp_da
+ .hvs_available_channels = BIT(2),
+ .hvs_output = 2,
+ },
+- .encoder_type = VC4_ENCODER_TYPE_TXP,
++ .encoder_type = VC4_ENCODER_TYPE_TXP0,
+ .has_byte_enable = true,
+ };
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-11 04:17:21 +0000