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Diffstat (limited to 'target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch')
-rw-r--r--target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch64
1 files changed, 0 insertions, 64 deletions
diff --git a/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch b/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch
deleted file mode 100644
index 375d119d55..0000000000
--- a/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1dcd0095019aca7533eaeed9475d995a4eb30137 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie@gmail.com>
-Date: Mon, 5 Jun 2017 21:21:26 +0200
-Subject: ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
-
-The dwmac-sun8i hardware is present on the Orange PI plus.
-It uses an external PHY rtl8211e via RGMII.
-
-This patch create the needed regulator, emac and phy nodes.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-@@ -47,6 +47,20 @@
- model = "Xunlong Orange Pi Plus / Plus 2";
- compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
-
-+ aliases {
-+ ethernet0 = &emac;
-+ };
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
-+ };
-+
- reg_usb3_vbus: usb3-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
-@@ -64,6 +78,24 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <&reg_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
-+&mdio {
-+ ext_rgmii_phy: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <0>;
-+ };
-+};
-+
- &mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_8bit_pins>;