diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch | 3 | ||||
| -rw-r--r-- | target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch b/target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch index d7424020a7..1aa36fcd3d 100644 --- a/target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch +++ b/target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch @@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org> phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o --- /dev/null +++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c -@@ -0,0 +1,392 @@ +@@ -0,0 +1,393 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* MediaTek 10GE SerDes PHY driver + * @@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org> + XTP_PCS_PWD_ASYNC(2)); + + usleep_range(1, 5); ++ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40); + + /* Setup TX DA default value */ + mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20); diff --git a/target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch b/target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch index d7424020a7..1aa36fcd3d 100644 --- a/target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch +++ b/target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch @@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org> phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o --- /dev/null +++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c -@@ -0,0 +1,392 @@ +@@ -0,0 +1,393 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* MediaTek 10GE SerDes PHY driver + * @@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org> + XTP_PCS_PWD_ASYNC(2)); + + usleep_range(1, 5); ++ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40); + + /* Setup TX DA default value */ + mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20); |