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authorElyes Haouas <ehaouas@noos.fr>2022-10-27 12:25:12 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-11-03 13:05:17 +0000
commit35c3ae3bf4a43a36028fbd9e34ea4cb758029bf1 (patch)
tree4b706d4931692f6cde4d16339d7de1b0bf5f1e55
parent109bd3b796bae2f8333d832e9f0cc778c6663297 (diff)
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treewide: Add 'IWYU pragma: export' comment
This pragma says to IWYU (Include What You Use) that the current file is supposed to provide commented headers. Change-Id: I482c645f6b5f955e532ad94def1b2f74f15ca908 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat
-rw-r--r--src/arch/x86/include/arch/cpu.h2
-rw-r--r--src/include/cbmem.h2
-rw-r--r--src/include/console/console.h2
-rw-r--r--src/include/cpu/cpu.h2
-rw-r--r--src/include/cpu/x86/msr.h2
-rw-r--r--src/include/device/mmio.h2
-rw-r--r--src/include/device/pci.h11
-rw-r--r--src/include/device/pci_ops.h2
-rw-r--r--src/include/device/pnp.h4
-rw-r--r--src/include/string.h4
-rw-r--r--src/include/types.h2
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h2
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h2
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.h2
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.h2
-rw-r--r--src/southbridge/intel/ibexpeak/pch.h3
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h3
17 files changed, 25 insertions, 24 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 3402215882a9..7c1a52eff5a2 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -4,7 +4,7 @@
#define ARCH_CPU_H
#include <types.h>
-#include <arch/cpuid.h>
+#include <arch/cpuid.h> /* IWYU pragma: export */
/*
* EFLAGS bits
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 5b5191aab204..40a0acb510d8 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -3,7 +3,7 @@
#ifndef _CBMEM_H_
#define _CBMEM_H_
-#include <commonlib/bsd/cbmem_id.h>
+#include <commonlib/bsd/cbmem_id.h> /* IWYU pragma: export */
#include <stddef.h>
#include <stdint.h>
#include <boot/coreboot_tables.h>
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 49bce6147053..6f44d7f95c1a 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -8,7 +8,7 @@
#include <stdint.h>
/* console.h is supposed to provide the log levels defined in here: */
-#include <commonlib/loglevel.h>
+#include <commonlib/loglevel.h> /* IWYU pragma: export */
#define RAM_DEBUG (CONFIG(DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER)
#define RAM_SPEW (CONFIG(DEBUG_RAM_SETUP) ? BIOS_SPEW : BIOS_NEVER)
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index 66103684ba1f..e668de8ff42d 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -3,7 +3,7 @@
#ifndef CPU_CPU_H
#define CPU_CPU_H
-#include <arch/cpu.h>
+#include <arch/cpu.h> /* IWYU pragma: export */
#include <stdint.h>
void cpu_initialize(unsigned int cpu_index);
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index 999fdaae5b48..f4e39859cf8e 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -3,7 +3,7 @@
#ifndef CPU_X86_MSR_H
#define CPU_X86_MSR_H
-#include <cpu/x86/msr_access.h>
+#include <cpu/x86/msr_access.h> /* IWYU pragma: export */
/* Intel SDM: Table 2-1
* IA-32 architectural MSR: Extended Feature Enable Register
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index b5b79ee5e690..2b9949e05a2c 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -3,7 +3,7 @@
#ifndef __DEVICE_MMIO_H__
#define __DEVICE_MMIO_H__
-#include <arch/mmio.h>
+#include <arch/mmio.h> /* IWYU pragma: export */
#include <commonlib/helpers.h>
#include <endian.h>
#include <types.h>
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index f28f319d8cc6..88b955570a69 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -19,14 +19,15 @@
#if CONFIG(PCI)
-#include <stdint.h>
-#include <stddef.h>
-#include <device/pci_def.h>
-#include <device/resource.h>
+/* When <device/pci.h> is needed, it supposed to provide <device/pci_{def,type}.h> */
#include <device/device.h>
+#include <device/pci_def.h> /* IWYU pragma: export */
#include <device/pci_ops.h>
#include <device/pci_rom.h>
-#include <device/pci_type.h>
+#include <device/pci_type.h> /* IWYU pragma: export */
+#include <device/resource.h>
+#include <stddef.h>
+#include <stdint.h>
/* Common pci operations without a standard interface */
struct pci_operations {
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index a1678255c451..b5d4e238aab5 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -6,7 +6,7 @@
#include <stdint.h>
#include <device/device.h>
#include <device/pci_type.h>
-#include <arch/pci_ops.h>
+#include <arch/pci_ops.h> /* IWYU pragma: export */
void __noreturn pcidev_die(void);
diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h
index e2a6dc23953d..ac23a495012d 100644
--- a/src/include/device/pnp.h
+++ b/src/include/device/pnp.h
@@ -6,8 +6,8 @@
#include <stdint.h>
#include <device/device.h>
/* When <device/pnp.h> is needed, it supposed to provide <device/pnp_{def,type}.h> */
-#include <device/pnp_def.h>
-#include <device/pnp_type.h>
+#include <device/pnp_def.h> /* IWYU pragma: export */
+#include <device/pnp_type.h> /* IWYU pragma: export */
#include <arch/io.h>
#if !ENV_PNP_SIMPLE_DEVICE
diff --git a/src/include/string.h b/src/include/string.h
index f595c7ed2e0d..92ea5e5f7f77 100644
--- a/src/include/string.h
+++ b/src/include/string.h
@@ -3,9 +3,9 @@
#ifndef STRING_H
#define STRING_H
-#include <stdarg.h>
+#include <stdarg.h> /* IWYU pragma: export */
#include <stddef.h>
-#include <stdio.h>
+#include <stdio.h> /* IWYU pragma: export */
void *memcpy(void *dest, const void *src, size_t n);
void *memmove(void *dest, const void *src, size_t n);
diff --git a/src/include/types.h b/src/include/types.h
index 8724d4b01f9b..ca4571777cf0 100644
--- a/src/include/types.h
+++ b/src/include/types.h
@@ -4,11 +4,13 @@
#define __TYPES_H
/* types.h is supposed to provide the standard headers defined in here: */
+/* IWYU pragma: begin_exports */
#include <commonlib/bsd/cb_err.h>
#include <limits.h>
#include <stdbool.h>
#include <stdint.h>
#include <stddef.h>
+/* IWYU pragma: end_exports */
/*
* This may mean something else on architectures where the bits are numbered
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 15d908ac95a8..34b36c38661a 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -22,7 +22,7 @@
#define DEFAULT_GPIOBASE 0x0480
#define DEFAULT_PMBASE 0x0500
-#include <southbridge/intel/common/rcba.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
#if CONFIG(SOUTHBRIDGE_INTEL_BD82X6X)
#define CROS_GPIO_DEVICE_NAME "CougarPoint"
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index f2ec1c668d00..68a32dfa55d6 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -7,7 +7,7 @@
#define DEFAULT_GPIOBASE 0x0480
#define DEFAULT_PMBASE 0x0500
-#include <southbridge/intel/common/rcba.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index 56f14b0d2f33..f0b60f621598 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -5,7 +5,7 @@
#define DEFAULT_TBAR ((u8 *)0xfed1b000)
-#include <southbridge/intel/common/rcba.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
#if CONFIG(BOARD_EMULATION_QEMU_X86_Q35)
/*
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 22546897a7d9..33386f5aada4 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -5,7 +5,7 @@
#define DEFAULT_TBAR ((u8 *)0xfed1b000)
-#include <southbridge/intel/common/rcba.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
#define DEFAULT_PMBASE 0x00000500
#define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60)
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index 83e86c266c55..1f5b4ea9a99c 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -4,6 +4,7 @@
#define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
#include <acpi/acpi.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
/* PCH types */
#define PCH_TYPE_CPT 0x1c /* CougarPoint */
@@ -24,8 +25,6 @@
#define DEFAULT_PMBASE 0x0500
#define DEFAULT_HECIBAR ((u8 *)0xfed17000)
-#include <southbridge/intel/common/rcba.h>
-
#ifndef __ACPI__
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 7d9fc6d6afd2..1623274633e6 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -4,6 +4,7 @@
#define SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
#include <acpi/acpi.h>
+#include <southbridge/intel/common/rcba.h> /* IWYU pragma: export */
#define CROS_GPIO_DEVICE_NAME "LynxPoint"
@@ -55,8 +56,6 @@
#define DEFAULT_GPIOSIZE 0x80
#endif
-#include <southbridge/intel/common/rcba.h>
-
#ifndef __ACPI__
#if CONFIG(INTEL_LYNXPOINT_LP)
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-11 09:42:45 +0000