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| author | Matt DeVillier <matt.devillier@gmail.com> | 2024-02-20 09:36:59 -0600 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@gmail.com> | 2024-02-22 22:19:35 +0000 |
| commit | 4f1ba69b3c0d3ac8501b713642b11c811c09024c (patch) | |
| tree | 54bc87076331a30ac5d9fb4448715042d9d8c327 | |
| parent | b6d16fb3fa777a7ba22a12fbd5873f272fd5d81d (diff) | |
| download | coreboot-4f1ba69b3c0d3ac8501b713642b11c811c09024c.tar.gz coreboot-4f1ba69b3c0d3ac8501b713642b11c811c09024c.tar.bz2 coreboot-4f1ba69b3c0d3ac8501b713642b11c811c09024c.zip | |
soc/intel/common/lpc: Skip setting resources for disabled devices
If a downstream LPC device (eg, SIO function) is disabled, we shouldn't
attempt to open PMIO windows for it, as those functions often have
unset IO bases (which default to 0), resulting in false errors like:
[ERROR] LPC IO decode base 0!
TEST=build/boot purism/librem_cnl (Mini v2), verify no LPC IO errors
in cbmem log for disabled SIO functions.
Change-Id: I92c79fc01be21466976f3056242f6d1824878eab
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
| -rw-r--r-- | src/soc/intel/common/block/lpc/lpc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index dbd982b5937a..b27e09e96e73 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -87,6 +87,9 @@ static void pch_lpc_loop_resources(struct device *dev) { struct resource *res; + if (!dev->enabled) + return; + for (res = dev->resource_list; res; res = res->next) { if (res->flags & IORESOURCE_IO) lpc_open_pmio_window(res->base, res->size); |