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| author | Matt DeVillier (AMD) <matt.devillier@amd.corp-partner.google.com> | 2022-07-20 15:39:06 -0500 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-07-22 02:34:52 +0000 |
| commit | 7f7f65cfb9ccdaaa38bad553f459b2fd19503d81 (patch) | |
| tree | acd764b289145165b3685035d948b3d767d47289 | |
| parent | c38347873ecea0e38c3fbf5f79f33f13b60dee90 (diff) | |
| download | coreboot-7f7f65cfb9ccdaaa38bad553f459b2fd19503d81.tar.gz coreboot-7f7f65cfb9ccdaaa38bad553f459b2fd19503d81.tar.bz2 coreboot-7f7f65cfb9ccdaaa38bad553f459b2fd19503d81.zip | |
mb/google/kahlee: Increase VRAM from 16 to 32 MiB
While adequate for ChromeOS, 16MiB VRAM is insufficient for current
mainline Linux and Windows amdgpu drivers to operate properly. Under
Linux, the driver fails to allocate a framebuffer and causes multiple
kernel panics. Under Windows, the driver fails to load due to
insufficient resources available. Revert the VRAM allocation to the
previous amount of 32MiB.
This change reverts
commit 87dcd0061af4 ("mainboard/google/kahlee: Reduce VRAM to 16MB")
Test: build/boot Linux 5.17.x on google/liara, verify framebuffer
allocation succeeds and no kernel panic reported.
Change-Id: I1967a203fed80456a20af00943eba21bc1c0577b
Signed-off-by: Matt DeVillier (AMD) <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66022
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb index fda218df247c..0631b2e95aed 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index 7f0c87d51d75..4ace016c5d11 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "stapm_percent" = "68" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index e26ad5803e21..29bbf3ea994d 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/devicetree.cb index b366280526b9..9a0c002229a1 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "lvds_poseq_varybl_to_blon" = "0x5" # in 4ms register "lvds_poseq_blon_to_varybl" = "0x5" # in 4ms diff --git a/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb b/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb index 9d4ff0e6a485..c19e015261d1 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2000000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb index 0050d80fea84..5791a24f6914 100644 --- a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb @@ -7,7 +7,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "16 * MiB" + register "uma_size" = "32 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2000000" register "stapm_power_mw" = "7800" |