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| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2021-07-28 16:44:43 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2022-05-20 02:51:33 +0000 |
| commit | 2ad74deb2a11772cdd23c3613b58e9116b36863a (patch) | |
| tree | 2227c58f32498b55cfa49833225ccd837d35375e /payloads/libpayload/Kconfig | |
| parent | 7439a49f4c306efe22c6c79babf42f2ca473d567 (diff) | |
| download | coreboot-2ad74deb2a11772cdd23c3613b58e9116b36863a.tar.gz coreboot-2ad74deb2a11772cdd23c3613b58e9116b36863a.tar.bz2 coreboot-2ad74deb2a11772cdd23c3613b58e9116b36863a.zip | |
libpayload/pci: Add support for bus mapping
Move the common APIs to pci_ops.c and IO based operations to
pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
BRANCH=cherry
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'payloads/libpayload/Kconfig')
| -rw-r--r-- | payloads/libpayload/Kconfig | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 4f8896aa6e28..7540c674a2c9 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -404,8 +404,14 @@ menu "Drivers" config PCI bool "Support for PCI devices" - depends on ARCH_X86 # for now - default y + default y if ARCH_X86 + default n + +config PCI_IO_OPS + bool "Support for PCI devices with port IO" + depends on PCI && IO_ADDRESS_SPACE + default y if ARCH_X86 + default n config NVRAM bool "Support for reading/writing NVRAM bytes" |