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| author | Xiang Wang <wxjstz@126.com> | 2018-08-01 12:36:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-05 10:03:40 +0000 |
| commit | ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2 (patch) | |
| tree | 14f28736ca3b1e00f7b4819c248e41123b69cc4b /src/arch/riscv/include/arch/cpu.h | |
| parent | ee0f225e3a4ad89af5aeb2ee623d97ffc5c456fe (diff) | |
| download | coreboot-ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2.tar.gz coreboot-ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2.tar.bz2 coreboot-ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2.zip | |
riscv: add support to check machine length at runtime
Highest two bits of misa can be used to check machine length. Add code
to support this.
Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/arch/riscv/include/arch/cpu.h')
| -rw-r--r-- | src/arch/riscv/include/arch/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/riscv/include/arch/cpu.h b/src/arch/riscv/include/arch/cpu.h index 6008c75122f1..d2f42a866523 100644 --- a/src/arch/riscv/include/arch/cpu.h +++ b/src/arch/riscv/include/arch/cpu.h @@ -51,5 +51,11 @@ static inline int supports_extension(char ext) return read_csr(misa) & (1 << (ext - 'A')); } +static inline int machine_xlen(void) +{ + int mxl = (read_csr(misa) >> (__riscv_xlen - 2)) & 3; + return (1 << mxl) * 16; +} + struct cpu_info *cpu_info(void); #endif /* __ARCH_CPU_H__ */ |