coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	arch/{arm,arm64,ppc64,riscv}: Add noop cpu_relax	Raul E Rangel	2021-11-25	1	-0/+2
*	arch/{arm,ppc64,riscv}: Remove cpu_info	Raul E Rangel	2021-07-26	1	-11/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/arch/riscv: Convert to SPDX license header	Patrick Georgi	2020-03-06	1	-14/+2
*	arch/non-x86: Remove use of __PRE_RAM__	Kyösti Mälkki	2019-08-20	1	-5/+1
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-1/+1
*	arch/riscv/include/arch: Don't use device_t	Elyes HAOUAS	2018-09-21	1	-1/+1
*	riscv: add support to check machine length at runtime	Xiang Wang	2018-09-05	1	-0/+6
*	riscv: add support to check ISA extension	Xiang Wang	2018-07-11	1	-0/+7
*	Constify struct cpu_device_id instances	Jonathan Neuschäfer	2017-11-23	1	-1/+1
*	arch/*: Update Kconfig symbol usage	Martin Roth	2017-07-07	1	-1/+1
*	src/arch: Improve code formatting	Elyes HAOUAS	2016-09-12	1	-3/+3
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove empty lines at end of file	Elyes HAOUAS	2015-06-08	1	-1/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich	2014-12-01	1	-0/+53