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author | Aaron Durbin <adurbin@chromium.org> | 2013-05-06 12:22:23 -0500 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-14 05:24:18 +0200 |
commit | 38c326d041218e65d156ce3dd3bfee39e73ceffa (patch) | |
tree | c48354cbb88efd809a37bb1d397ee76108ab68ec /src/cpu/intel | |
parent | 4409a5eef6d1d669caad1bfe3fbefee87ea7734e (diff) | |
download | coreboot-38c326d041218e65d156ce3dd3bfee39e73ceffa.tar.gz coreboot-38c326d041218e65d156ce3dd3bfee39e73ceffa.tar.bz2 coreboot-38c326d041218e65d156ce3dd3bfee39e73ceffa.zip |
x86: add thread support
Thread support is added for the x86 architecture. Both
the local apic and the tsc udelay() functions have a
call to thread_yield_microseconds() so as to provide an
opportunity to run pending threads.
Change-Id: Ie39b9eb565eb189676c06645bdf2a8720fe0636a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3207
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/haswell/mp_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/mp_init.c b/src/cpu/intel/haswell/mp_init.c index deba629623d0..357fbb291dd2 100644 --- a/src/cpu/intel/haswell/mp_init.c +++ b/src/cpu/intel/haswell/mp_init.c @@ -36,6 +36,7 @@ #include <lib.h> #include <smp/atomic.h> #include <smp/spinlock.h> +#include <thread.h> #include "haswell.h" /* This needs to match the layout in the .module_parametrs section. */ @@ -163,6 +164,7 @@ static void asmlinkage ap_init(unsigned int cpu, void *microcode_ptr) info = cpu_info(); info->index = cpu; info->cpu = cpu_devs[cpu]; + thread_init_cpu_info_non_bsp(info); apic_id_table[info->index] = lapicid(); info->cpu->path.apic.apic_id = apic_id_table[info->index]; |