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| author | Patrick Rudolph <siro@das-labor.org> | 2015-06-22 19:46:34 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-23 01:50:33 +0200 |
| commit | 78c6e3ec42e9519fc329a65045bfd8b169080b59 (patch) | |
| tree | a62a5f90a0787de74ca066a00959f49ca7775662 /src/device/dram/ddr3.c | |
| parent | 8c639359ea6dcb0eb445a37c1c276652b34ff437 (diff) | |
| download | coreboot-78c6e3ec42e9519fc329a65045bfd8b169080b59.tar.gz coreboot-78c6e3ec42e9519fc329a65045bfd8b169080b59.tar.bz2 coreboot-78c6e3ec42e9519fc329a65045bfd8b169080b59.zip | |
ddr3: add missing newline
Add missing newline to SPD CRC verification error message.
Verified by testing this code on Intel IvyBridge and Gigabyte GA-B75M-D3H.
Change-Id: Id1a0a2329507975c3f66ab884f6e26d99003318e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: http://review.coreboot.org/10636
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/device/dram/ddr3.c')
| -rw-r--r-- | src/device/dram/ddr3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index c10741bdb31a..e1bb873c1832 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -133,7 +133,7 @@ int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd) spd_crc = (spd[127] << 8) + spd[126]; /* Verify the CRC is correct */ if (crc != spd_crc) { - printram("ERROR: SPD CRC failed!!!"); + printram("ERROR: SPD CRC failed!!!\n"); ret = SPD_STATUS_CRC_ERROR; }; |