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path: root/src/device/dram/ddr3.c
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* device/dram/ddr3.c: Check SPD byte before using as a divisorMartin Roth2023-10-251-0/+4
* spd.h: Move enum ddr3_module_type to ddr3.hElyes Haouas2023-01-041-23/+1
* device/dram: Reformat codeElyes Haouas2022-09-131-37/+27
* arch/x86: Refactor the SMBIOS type 17 write functionSubrata Banik2021-11-111-5/+5
* device/dram/ddr3: Drop unused MRS helpersAngel Pons2021-04-051-223/+0
* device/dram/ddr3: Rename DDR3 SPD memory typesAngel Pons2021-04-051-10/+10
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-051-4/+4
* src/device: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-261-1/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-11/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* printf: Automatically prefix %p with 0xJulius Werner2019-12-111-1/+1
* AUTHORS: Move src/device copyrights into AUTHORS fileMartin Roth2019-09-171-2/+0
* dram: Add basic DDR4 SPD parsingAndrey Petrov2019-08-141-20/+3
* device/dram: Inline value into print statementJacob Garber2019-06-281-2/+1
* src/{device,drivers}: Add missing 'include <types.h>'Elyes HAOUAS2019-05-291-0/+1
* device/dram/ddr3: Remove unused variableElyes HAOUAS2019-04-251-3/+2
* device/ddr3: Prevent overflow when adding SMBUS Table 17 entriesNico Huber2018-09-141-0/+6
* nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph2018-08-211-0/+79
* nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph2018-08-201-0/+2
* src: Get rid of unneeded whitespaceElyes HAOUAS2018-07-021-2/+2
* device/dram/ddr3: improve XMP supportDan Elkouby2018-04-161-1/+16
* device/dram/ddr2.c: Add methods to compute to identify dramArthur Heymans2018-04-091-3/+3
* device/dram/ddr2: Add common ddr2 spd decoderPatrick Rudolph2017-03-101-1/+1
* device/dram/ddr3: add FTB timingsNicola Corna2016-12-271-7/+30
* device/dram/ddr3: Fix calculation CRC16 of SPDKyösti Mälkki2016-11-211-1/+1
* device/dram/ddr3: Calculate CRC16 of SPD unique identifierKyösti Mälkki2016-11-201-16/+37
* device/dram/ddr3: fix debug outputPatrick Rudolph2016-03-211-23/+27
* src/device/dram/ddr3: Parse additional informationPatrick Rudolph2016-03-031-0/+8
* nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph2016-02-201-0/+117
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-3/+0
* ddr3: add missing newlinePatrick Rudolph2015-06-231-1/+1
* ddr3: Fix SPD CRC calculationPatrick Rudolph2015-06-231-1/+1
* src/device: Doxygen fixesMartin Roth2015-01-121-1/+10
* ddr3: Plumber DIMM type to parsed structure.Vladimir Serbinenko2014-12-071-0/+1
* device/dram/ddr3.c: Fix sizeof on array func param overflowEdward O'Callaghan2014-11-081-1/+1
* sandy/ivybridge: Native raminit.Vladimir Serbinenko2014-07-291-4/+7
* device/dram/ddr3: Move CRC calculation in a separate functionAlexandru Gagniuc2013-12-171-20/+42
* device: Fix spellingMartin Roth2013-07-101-3/+3
* DDR3: Add utilities for creating MRS commandsAlexandru Gagniuc2013-06-041-0/+217
* dram: Add utilities for decoding DDR3 SPDsAlexandru Gagniuc2013-06-031-0/+372
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