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| author | Furquan Shaikh <furquan@google.com> | 2020-05-15 23:34:27 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-05-16 17:48:04 +0000 |
| commit | 196d8559d90ff1ac1ebf52fc23b5a6a2493b386c (patch) | |
| tree | 5508ff07871c84781f51a06562cb96cf06b60aab /src/device/pciexp_device.c | |
| parent | 563424e986edc1027d49c0efd151118a2e687c86 (diff) | |
| download | coreboot-196d8559d90ff1ac1ebf52fc23b5a6a2493b386c.tar.gz coreboot-196d8559d90ff1ac1ebf52fc23b5a6a2493b386c.tar.bz2 coreboot-196d8559d90ff1ac1ebf52fc23b5a6a2493b386c.zip | |
Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"
This reverts commit dcbf6454b6d2d9b3627a14126ef20ed4b9c7d954.
Reason for revert: Resource allocator patches need to be reverted
until the AMD chipsets can be fixed to handle the resource allocation
flow correctly.
Change-Id: I58c9fff1a18ea1c9941e29c2c6e60e338c517c30
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Diffstat (limited to 'src/device/pciexp_device.c')
| -rw-r--r-- | src/device/pciexp_device.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index f04d86515273..118920753904 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -512,7 +512,7 @@ static void pciexp_hotplug_dummy_read_resources(struct device *dev) { struct resource *resource; - /* Add extra memory space */ + // Add extra memory space resource = new_resource(dev, 0x10); resource->size = CONFIG_PCIEXP_HOTPLUG_MEM; resource->align = 12; @@ -520,7 +520,7 @@ static void pciexp_hotplug_dummy_read_resources(struct device *dev) resource->limit = 0xffffffff; resource->flags |= IORESOURCE_MEM; - /* Add extra prefetchable memory space */ + // Add extra prefetchable memory space resource = new_resource(dev, 0x14); resource->size = CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM; resource->align = 12; @@ -528,11 +528,7 @@ static void pciexp_hotplug_dummy_read_resources(struct device *dev) resource->limit = 0xffffffffffffffff; resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; - /* Set resource flag requesting allocation above 4G boundary. */ - if (CONFIG(PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G)) - resource->flags |= IORESOURCE_ABOVE_4G; - - /* Add extra I/O space */ + // Add extra I/O space resource = new_resource(dev, 0x18); resource->size = CONFIG_PCIEXP_HOTPLUG_IO; resource->align = 12; |