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| author | Bill XIE <persmule@hardenedlinux.org> | 2022-08-03 00:18:14 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-07 19:40:28 +0000 |
| commit | a43380e3d5637b5d2e23b001a5c2519696a21c5d (patch) | |
| tree | 07db5c4f9432a8e2a85733b6ae263a1f4f83cdc6 /src/device/pciexp_device.c | |
| parent | debb8085c6869caaa83cf80d35e035cb9e97ddce (diff) | |
| download | coreboot-a43380e3d5637b5d2e23b001a5c2519696a21c5d.tar.gz coreboot-a43380e3d5637b5d2e23b001a5c2519696a21c5d.tar.bz2 coreboot-a43380e3d5637b5d2e23b001a5c2519696a21c5d.zip | |
pciexp_device: Fix a bug in pciexp_enable_ltr()
'parent_cap' should be found from 'parent' instead of 'dev'.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I99dab83d90287ca924d30dc4aeac0ff96e877e5c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/device/pciexp_device.c')
| -rw-r--r-- | src/device/pciexp_device.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 36143402abd6..c03c224003d6 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -183,7 +183,7 @@ static void pciexp_enable_ltr(struct device *dev) unsigned int parent_cap = 0; if (!dev->ops->ops_pci || !dev->ops->ops_pci->get_ltr_max_latencies) { parent = dev->bus->dev; - parent_cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); + parent_cap = pci_find_capability(parent, PCI_CAP_ID_PCIE); if (!parent_cap) return; } |