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author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-24 18:21:13 -0700 |
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committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-02 17:15:22 +0200 |
commit | 672df16a493a5ddc933e8634772beedefc369a3d (patch) | |
tree | 11a1b90057550c80e1c5cec18fd15d34fa465d13 /src/drivers/intel/fsp2_0/silicon_init.c | |
parent | 48e0792e4ae8d4267dc2d5fb6af3b2c079a4f61f (diff) | |
download | coreboot-672df16a493a5ddc933e8634772beedefc369a3d.tar.gz coreboot-672df16a493a5ddc933e8634772beedefc369a3d.tar.bz2 coreboot-672df16a493a5ddc933e8634772beedefc369a3d.zip |
drivers/intel/fsp2_0: Display FSP calls and status
Disable the chatty FSP behavior for normal builds. Use a Kconfig value
to enable the display of the FSP call entry points, the call parameters
and the returned status for MemoryInit, SiliconInit and FspNotify. The
debug code is placed into drivers/intel/fsp2_0/debug.c.
TEST=Build and run on Galileo Gen2
Change-Id: Iacae66f72bc5b4ba1469f53fcce4669726234441
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15989
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/silicon_init.c')
-rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index c069ff168785..af40b6da1cfe 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -23,9 +23,6 @@ struct fsp_header fsps_hdr; -typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn) - (void *silicon_upd); - static enum fsp_status do_silicon_init(struct fsp_header *hdr) { struct FSPS_UPD upd, *supd; @@ -44,15 +41,18 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr) /* Give SoC/mainboard a chance to populate entries */ platform_fsp_silicon_init_params_cb(&upd); - timestamp_add_now(TS_FSP_SILICON_INIT_START); - post_code(POST_FSP_SILICON_INIT); + /* Call SiliconInit */ silicon_init = (void *) (hdr->image_base + hdr->silicon_init_entry_offset); + fsp_debug_before_silicon_init(silicon_init, supd, &upd); + + timestamp_add_now(TS_FSP_SILICON_INIT_START); + post_code(POST_FSP_SILICON_INIT); status = silicon_init(&upd); timestamp_add_now(TS_FSP_SILICON_INIT_END); post_code(POST_FSP_SILICON_INIT); - printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); + fsp_debug_after_silicon_init(status); /* Handle any resets requested by FSPS. */ fsp_handle_reset(status); |