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path: root/src/drivers/intel/fsp2_0/silicon_init.c
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* drivers/intel/fsp2_0: Support embedding a second FSP-M/FSP-SJonathon Hall2023-10-201-3/+5
* drivers/intel/fsp2_0: Introduce MRC cache store after FSP-M/S APIsSubrata Banik2023-09-051-0/+4
* commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious2023-06-231-7/+7
* drivers/intel/fsp2_0: Apply FSP Reset Status W/A for MultiPhaseSiInitSubrata Banik2023-05-021-0/+3
* src/drivers: Remove unnecessary space after castsElyes Haouas2022-11-221-3/+3
* drivers/intel/fsp2_0: Fix location of timestamp for loading FSP-SReka Norman2022-09-081-1/+2
* driver/intel/fsp2_0: Disable NULL deref code when calling FSPArthur Heymans2022-06-011-0/+4
* drivers/intel/fsp2_0: Add provision to extract FSP Performance DataSubrata Banik2022-04-021-0/+3
* drivers/intel/fsp2_0/include/fsp: fix fsp_headerJulian Schroeder2022-02-021-3/+3
* drivers/intel/fsp2_0: Add preload_fspm and preload_fspsRaul E Rangel2021-11-081-0/+9
* drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling methodSubrata Banik2021-09-161-6/+18
* drivers/intel/fsp2_0: Retype loop variable from int to uint32_tAngel Pons2021-09-091-2/+2
* drivers/intel/fsp2: Change FSPS returned message to INFORaul E Rangel2021-07-021-1/+1
* drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPSMartin Roth2021-06-101-0/+1
* intel: fsp2_0: Move last pieces to new CBFS APIJulius Werner2021-04-141-4/+1
* fsp2_0: Replace fspld->get_destination() callback with CBFS allocatorJulius Werner2021-04-051-9/+3
* program_loading: Replace prog_rdev() with raw start pointer and sizeJulius Werner2021-03-171-1/+4
* drivers/intel/fsp2_0: Allow larger FSPS UPD than expected in corebootNikolai Vyssotski2021-02-171-4/+8
* soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki2021-02-091-3/+3
* drivers/intel/fsp1_1,fsp2_0: Refactor logo displayKyösti Mälkki2021-02-091-10/+6
* drivers/intel/fsp2_0: Fix running on x86_64Patrick Rudolph2021-02-041-4/+4
* drivers/intel/fsp2_0: factor out and improve UPD signature checkFelix Held2021-01-301-3/+1
* stage_cache: Add resume_from_stage_cache()Kyösti Mälkki2021-01-291-1/+1
* drivers/intel/fsp2_0/memory_init: Wrap calls into FSPPatrick Rudolph2020-12-051-1/+9
* drivers/intel/fsp2_0: Do AP re-init after FSP-S if USE_INTEL_FSP_MP_INIT enableSubrata Banik2020-08-061-0/+4
* drivers/intel/fsp2_0: Add FSP 2.2 specific supportSubrata Banik2020-06-141-13/+103
* drivers/intel/fsp2_0: add option to compress FSP-S in cbfsAaron Durbin2020-05-281-39/+21
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-11/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* {drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoCWim Vervoorn2019-12-191-10/+11
* drivers/intel/fsp2_0: Add logo supportWim Vervoorn2019-12-061-0/+13
* AUTHORS: Move src/drivers/[a*-i*] copyrights into AUTHORS fileMartin Roth2019-10-221-3/+5
* drivers/intel/fsp2_0: Make vbt_get() conditionalMarshall Dawson2019-10-201-8/+5
* drivers/intel/fsp2_0: Allocate cfg_region_size for UPDMarshall Dawson2019-09-131-2/+10
* src/{device,drivers}: Add missing 'include <types.h>'Elyes HAOUAS2019-05-291-0/+1
* drivers/intel/fsp2_0: Fix typo mistakeSubrata Banik2019-05-291-1/+1
* post_code: add post code for video initialization failureKeith Short2019-05-221-1/+13
* post_code: add post code for invalid vendor binaryKeith Short2019-05-221-1/+2
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS2018-11-121-1/+0
* drivers/intel/fsp2_0: Make use of xmalloc for FSP-S UPDSubrata Banik2018-05-251-5/+8
* intel/fsp: Add and use new post codes for FSP phase indicationSubrata Banik2017-07-171-1/+1
* drivers/intel/fsp2_0: Remove braces for single statementsLee Leahy2017-03-101-6/+3
* drivers/intel/{fsp1_1,fsp2_0}: Provide separate function for fsp loadFurquan Shaikh2017-02-221-4/+12
* fsp2_0: implement stage cache for silicon initBrandon Breitenstein2016-11-211-1/+17
* drivers/intel/fsp2_0: Make FSP Headers Consumable out of BoxBrandon Breitenstein2016-09-021-3/+3
* drivers/intel/fsp2_0: FSP driver handles all FSP errorsLee Leahy2016-08-031-15/+14
* drivers/intel/fsp2_0: Display FSP calls and statusLee Leahy2016-08-021-6/+6
* drivers/intel/fsp2_0: Update the copyrightsLee Leahy2016-07-281-1/+1
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