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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-22 23:40:29 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-23 17:16:45 +0100 |
| commit | 991f18475c951dcd728eb8550b10dd62938b1770 (patch) | |
| tree | 0b379c255f583f6a389dbffc5adbd935fc84fb43 /src/include/cpu/amd/msr.h | |
| parent | baa1acde7bb46a06e34404796aeaa1d5c7c6ec47 (diff) | |
| download | coreboot-991f18475c951dcd728eb8550b10dd62938b1770.tar.gz coreboot-991f18475c951dcd728eb8550b10dd62938b1770.tar.bz2 coreboot-991f18475c951dcd728eb8550b10dd62938b1770.zip | |
cpu/amd: de-duplicate MSR include files
Change-Id: I8e01a4ab68b463efe02c27f589e0b4b719532eb5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12510
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/include/cpu/amd/msr.h')
| -rw-r--r-- | src/include/cpu/amd/msr.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h new file mode 100644 index 000000000000..31af3e6e926e --- /dev/null +++ b/src/include/cpu/amd/msr.h @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 Advanced Micro Devices, Inc. + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef CPU_AMD_MSR_H +#define CPU_AMD_MSR_H + +#include <cpu/x86/msr.h> + +#define SMM_BASE_MSR 0xC0010111 +#define SMM_ADDR_MSR 0xC0010112 +#define SMM_MASK_MSR 0xC0010113 + +#define HWCR_MSR 0xC0010015 +#define NB_CFG_MSR 0xC001001f +#define LS_CFG_MSR 0xC0011020 +#define IC_CFG_MSR 0xC0011021 +#define DC_CFG_MSR 0xC0011022 +#define BU_CFG_MSR 0xC0011023 +#define FP_CFG_MSR 0xC0011028 +#define DE_CFG_MSR 0xC0011029 +#define BU_CFG2_MSR 0xC001102A +#define BU_CFG3_MSR 0xC001102B +#define EX_CFG_MSR 0xC001102C +#define LS_CFG2_MSR 0xC001102D +#define IBS_OP_DATA3_MSR 0xC0011037 + +#define CPU_ID_FEATURES_MSR 0xC0011004 +#define CPU_ID_HYPER_EXT_FEATURES 0xC001100d +#define LOGICAL_CPUS_NUM_MSR 0xC001100d +#define CPU_ID_EXT_FEATURES_MSR 0xC0011005 + +#endif /* CPU_AMD_MSR_H */ |