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authorArthur Heymans <arthur@aheymans.xyz>2023-05-17 18:10:47 +0200
committerMartin L Roth <gaumless@gmail.com>2023-06-04 19:22:08 +0000
commit1efca4d570b9f9b684a6fc0d7bcdead8b0fcf1cf (patch)
tree716894efa735c0ad6172b040882a5bd581bc2f49 /src/include/cpu
parentb992df98919246b70fa2f0306ba2f2056eae6271 (diff)
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cpu/x86/smm: Drop fxsave/fxrstor logic
Since we now explicitly compile both ramstage and smihandler code without floating point operations and associated registers we don't need to save/restore floating point registers. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I180b9781bf5849111501ae8e9806554a7851c0da Reviewed-on: https://review.coreboot.org/c/coreboot/+/75317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/x86/smm.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 4c97f2139bd4..68c7c3bba743 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -98,8 +98,6 @@ struct smm_stub_params {
u32 stack_size;
u32 stack_top;
u32 c_handler;
- u32 fxsave_area;
- u32 fxsave_area_size;
/* The apic_id_to_cpu provides a mapping from APIC id to CPU number.
* The CPU number is indicated by the index into the array by matching
* the default APIC id and value at the index. The stub loader