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| author | Cliff Huang <cliff.huang@intel.corp-partner.google.com> | 2022-03-07 18:39:56 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-09 22:57:04 +0000 |
| commit | 6277077d88bb2b144d62cf0d83ab8f055ae0a71b (patch) | |
| tree | 86ec3fb62feaa6ebb6adbe1f34e6e3fa66adc639 /src/include/cpu | |
| parent | 9f4010753d54447574d7a4e01a11f8b4f810830f (diff) | |
| download | coreboot-6277077d88bb2b144d62cf0d83ab8f055ae0a71b.tar.gz coreboot-6277077d88bb2b144d62cf0d83ab8f055ae0a71b.tar.bz2 coreboot-6277077d88bb2b144d62cf0d83ab8f055ae0a71b.zip | |
cpu/intel/common: Add support for energy performance preference (EPP)
This provides support to update energy performance preference value.
BUG=b:219785001
BRANCH=firmware-brya-14505.B
Signed-off-by: Cliff Huang <cliff.huang@intel.corp-partner.google.com>
Change-Id: I381bca6c7746a4ae7ca32aa1b4992a6d53c8eaaa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/x86/msr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 4d1cb68279b1..9f30c057edc6 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -86,8 +86,11 @@ #define IA32_VMX_MISC_MSR 0x485 #define IA32_PM_ENABLE 0x770 +#define HWP_ENABLE 0x1 #define IA32_HWP_CAPABILITIES 0x771 #define IA32_HWP_REQUEST 0x774 +#define IA32_HWP_REQUEST_EPP_MASK 0xff000000 +#define IA32_HWP_REQUEST_EPP_SHIFT 24 #define IA32_HWP_STATUS 0x777 #define IA32_L3_PROTECTED_WAYS 0xc85 #define IA32_SF_QOS_INFO 0xc87 |