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authorMeera Ravindranath <meera.ravindranath@intel.com>2021-09-13 13:35:34 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-09-30 13:37:57 +0000
commitf3c42825f3d984ff6246789167a527ad51b6d094 (patch)
treeb00d615606d5fa330ef2d6c340ae3d4f7ab545b4 /src/include/cpu
parent4df35b6ec88be35a946565438a4c5c51fc3ad3b9 (diff)
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soc/intel/alderlake: Add CPU ID 0x906a4
TEST=Build and boot brya Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Change-Id: I4342c7343876eb40c2955f6f4dd99d6346852dc0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/intel/cpu_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index 8d03d75e6adb..53140762d47d 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -54,5 +54,6 @@
#define CPUID_ALDERLAKE_A0 0x906a0
#define CPUID_ALDERLAKE_A1 0x906a1
#define CPUID_ALDERLAKE_A2 0x906a2
+#define CPUID_ALDERLAKE_A3 0x906a4
#endif /* CPU_INTEL_CPU_IDS_H */