summaryrefslogtreecommitdiffstats
path: root/src/include/device/pci_rom.h
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2017-03-07 17:45:12 -0800
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-13 17:23:37 +0100
commit6a566d7fbee8e81fa22916a29339e5991872edfb (patch)
tree21840b8f2965439422e809ab56f9ef19cdccf4bd /src/include/device/pci_rom.h
parentd0f26fcea2fdab02d9b9fc1fceb9e782694a55bc (diff)
downloadcoreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.tar.gz
coreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.tar.bz2
coreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.zip
src/include: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters Changed a few comments to reduce line length. File src/include/cpu/amd/vr.h was skipped. TEST=Build and run on Galileo Gen2 Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18687 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/device/pci_rom.h')
-rw-r--r--src/include/device/pci_rom.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h
index 7266a8f34e2b..c5ace4c788a6 100644
--- a/src/include/device/pci_rom.h
+++ b/src/include/device/pci_rom.h
@@ -35,7 +35,8 @@ struct pci_data {
};
struct rom_header *pci_rom_probe(struct device *dev);
-struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_header);
+struct rom_header *pci_rom_load(struct device *dev,
+ struct rom_header *rom_header);
unsigned long
pci_rom_write_acpi_tables(struct device *device,