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| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:37:30 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:52 +0000 |
| commit | 50863daef8ed75c0cb3dfd375e7622c898de5821 (patch) | |
| tree | cbb2dea518524f8c9ce5edca5d57132ca9705086 /src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb | |
| parent | 0949e739066c3509e05db2b9ed71cefaaa62205f (diff) | |
| download | coreboot-50863daef8ed75c0cb3dfd375e7622c898de5821.tar.gz coreboot-50863daef8ed75c0cb3dfd375e7622c898de5821.tar.bz2 coreboot-50863daef8ed75c0cb3dfd375e7622c898de5821.zip | |
src/mainboard to src/security: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb')
| -rw-r--r-- | src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb index e583f7f763d0..c3c6b1b17abd 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb @@ -100,7 +100,7 @@ chip northbridge/intel/x4x # Northbridge device pnp 2e.a on # ACPI irq 0xe4 = 0x10 # Power dram during s3 end - device pnp 2e.b on # HWM, front pannel LED + device pnp 2e.b on # HWM, front panel LED io 0x60 = 0x290 irq 0x70 = 0 end |