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| author | Ivy Jian <ivy.jian@quanta.corp-partner.google.com> | 2022-06-06 17:11:54 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-09 13:35:09 +0000 |
| commit | 81d3856755c88297a5c1ad94f452db3996287eec (patch) | |
| tree | 140842a0fe696f96ea87315f495322e096bd7e69 /src/mainboard/google/brya/variants/agah/overridetree.cb | |
| parent | 880b917dc468b8dd4a48ac06a41bd2749907e38c (diff) | |
| download | coreboot-81d3856755c88297a5c1ad94f452db3996287eec.tar.gz coreboot-81d3856755c88297a5c1ad94f452db3996287eec.tar.bz2 coreboot-81d3856755c88297a5c1ad94f452db3996287eec.zip | |
mb/google/brya/var/agah: Use USB2_PORT_MAX_TYPE_C for Type-C USB2 port
Override the type-C USB2 port setting from `USB2_PORT_TYPE_C` to `USB2_PORT_MAX_TYPE_C`.
The change is required to detect USB2 device on type-C port of Agah boards.
BUG=b:233554817
TEST=build and test USB2 hub could be detected on both the Type-C ports.
=================================================================
usb 3-3: New USB device found,idVendor=1a40,idProduct=0801,bcdDevice= 1.00
usb 3-3: New USB device strings: Mfr=0, Product=1, SerialNumber=0
usb 3-3: Product: USB 2.0 Hub
hub 3-3:1.0: USB hub found
hub 3-3:1.0: 4 ports detected
=================================================================
Change-Id: I856402aa128db0c4ba092e1c2a66e29bc9165c40
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64988
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/agah/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/agah/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb index fd414480d0cd..484c5f6f8a3c 100644 --- a/src/mainboard/google/brya/variants/agah/overridetree.cb +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -35,6 +35,7 @@ chip soc/intel/alderlake register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1 + register "usb2_ports[2]" = "USB2_PORT_MAX_TYPE_C(OC2)" # set to Max for USB2_C2 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN register "usb2_ports[4]" = "USB2_PORT_EMPTY" # register "usb2_ports[6]" = "USB2_PORT_EMPTY" # |