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| author | Felix Singer <felixsinger@posteo.net> | 2021-12-05 02:40:26 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2021-12-09 21:52:13 +0000 |
| commit | 715b787fd3d1a0e714da795ea3d3eaf28ca49577 (patch) | |
| tree | 36bddb19913ef007da7ba6d4aa29758e21ca189f /src/mainboard/google/deltaur/variants | |
| parent | 2bf2e6d1ccd87cdd8d9c189972eae89e47e542c8 (diff) | |
| download | coreboot-715b787fd3d1a0e714da795ea3d3eaf28ca49577.tar.gz coreboot-715b787fd3d1a0e714da795ea3d3eaf28ca49577.tar.bz2 coreboot-715b787fd3d1a0e714da795ea3d3eaf28ca49577.zip | |
soc/intel/tigerlake: Hook up SMBus device to devicetree
Hook up `SmbusEnable` FSP setting to devicetree state and drop its
redundant devicetree setting `SmbusEnable`.
The following mainboards enable the SMBus device in the devicetree
despite `SmbusEnable` is not being set.
* google/deltaur
* starlabs/laptop
Thus, set it to off to keep the current state unchanged.
Change-Id: I0789af20beb147fc1a6a7d046cdcea15cb44ce4c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59883
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/deltaur/variants')
| -rw-r--r-- | src/mainboard/google/deltaur/variants/baseboard/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb index 72ed789aec67..9ed8fb299e46 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb @@ -291,7 +291,7 @@ chip soc/intel/tigerlake device pci 1f.1 off end # P2SB device pci 1f.2 hidden end # PMC device pci 1f.3 on end # Intel HDA - device pci 1f.4 on end # SMBus + device pci 1f.4 off end # SMBus device pci 1f.5 on end # PCH SPI Flash Controller device pci 1f.6 off end # GbE Controller device pci 1f.7 off end # Intel Trace Hub |