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| author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2021-11-09 23:03:35 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-17 14:30:34 +0000 |
| commit | a592bef03f6b1fdcbf5556cb8d200fcba3037492 (patch) | |
| tree | 64c92042589f38f4fdbfb3fff999438b96c0fa3a /src/mainboard/google/guybrush | |
| parent | 847a39fec7eb6b63497c0f1b7df82c19c226e0a1 (diff) | |
| download | coreboot-a592bef03f6b1fdcbf5556cb8d200fcba3037492.tar.gz coreboot-a592bef03f6b1fdcbf5556cb8d200fcba3037492.tar.bz2 coreboot-a592bef03f6b1fdcbf5556cb8d200fcba3037492.zip | |
mb/google/guybrush: Update SPKR GPIO configuration for guybrush/nipperkin
For Guybrush Board Version 2, Nipperking Board Version 1,
update SPKR GPIO to match H/W schematic:
SPKR: GPIO31
For Nipperkin Board Version 2, update SPKR GPIO to
match H/W schematic:
SPKR: GPIO70
BUG=b:202992077
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
Change-Id: I3d82292b116f53d85d9518364ffd2169bd915a7e
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59051
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/guybrush')
4 files changed, 13 insertions, 7 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 82956dc3e658..0720bc295aa0 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -66,8 +66,8 @@ static const struct soc_amd_gpio base_gpio_table[] = { PAD_GPO(GPIO_29, LOW), /* ESPI_CS_L */ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), - /* EN_SPKR */ - PAD_GPO(GPIO_31, HIGH), + /* Unused */ + PAD_NC(GPIO_31), /* Unused */ PAD_NC(GPIO_32), /* GPIO_33 - GPIO_39: Not available */ @@ -83,8 +83,8 @@ static const struct soc_amd_gpio base_gpio_table[] = { PAD_GPO(GPIO_68, HIGH), /* SD_AUX_RESET_L */ PAD_GPO(GPIO_69, HIGH), - /* Unused TP27 */ - PAD_NC(GPIO_70), + /* EN_SPKR */ + PAD_GPO(GPIO_70, HIGH), /* GPIO_71 - GPIO_73: Not available */ /* Unused TP49 */ PAD_NC(GPIO_74), diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c index 6309ec242743..e90f4a3a89ce 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c +++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c @@ -9,8 +9,6 @@ /* This table is used by guybrush variant with board version < 2. */ static const struct soc_amd_gpio bid1_ramstage_gpio_table[] = { - /* Unused TP183 */ - PAD_NC(GPIO_31), /* EN_SPKR */ PAD_GPO(GPIO_69, HIGH), /* SD_AUX_RESET_L */ @@ -37,6 +35,10 @@ static const struct soc_amd_gpio bid2_ramstage_gpio_table[] = { PAD_NC(GPIO_85), /* EN_PWR_FP */ PAD_GPO(GPIO_32, LOW), + /* EN_SPKR */ + PAD_GPO(GPIO_31, HIGH), + /* Unused TP27 */ + PAD_NC(GPIO_70), }; static const struct soc_amd_gpio override_early_gpio_table[] = { diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 2c502df246e1..a2a0e93f460b 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -22,6 +22,10 @@ static const struct soc_amd_gpio bid1_override_gpio_table[] = { PAD_NC(GPIO_85), /* EN_PWR_FP */ PAD_GPO(GPIO_32, LOW), + /* EN_SPKR */ + PAD_GPO(GPIO_31, HIGH), + /* Unused TP27 */ + PAD_NC(GPIO_70), }; /* This table is used by nipperkin variant with board version >= 2. */ diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index 3599b2808fb3..2d3b1624d33e 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -166,7 +166,7 @@ chip soc/amd/cezanne chip drivers/generic/max98357a register "hid" = ""MX98360A"" - register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_31)" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_70)" register "sdmode_delay" = "5" device generic 0.1 on end end |