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authorSubrata Banik <subrata.banik@intel.com>2021-06-04 16:47:19 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-05 19:54:43 +0000
commit2cfb83fcf360b8d688f003eeb557111c5961e312 (patch)
tree21f3d8bd13b7d13a2dc0cdd1ca94a172a5aaa6d0 /src/mainboard/intel/adlrvp/devicetree.cb
parentc000057aa60f710c2b515f6a0e86fb407e2686d8 (diff)
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mb/intel/adlrvp: Use device aliases
Use the device aliases provided by alderlake chipset.cb instead of the raw pci device+function. Take advantage of the default states in chipset.cb and only list the devices that are enabled for all different adlrvp boards. TEST=Dump devicetree device enable list without and with this CL, no difference observed. Change-Id: Ib9e82d953416c076588974f3167d00ae96f01bb5 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55205 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/devicetree.cb')
-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb115
1 files changed, 43 insertions, 72 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index 04c32723ac11..9def4be7d32b 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -204,10 +204,9 @@ chip soc/intel/alderlake
}"
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 01.0 on end # PEG10
- device pci 02.0 on end # Graphics
- device pci 04.0 on
+ device ref pcie5 on end
+ device ref igpu on end
+ device ref dtt on
chip drivers/intel/dptf
## sensor information
@@ -301,82 +300,57 @@ chip soc/intel/alderlake
device generic 0 on end
end
- end # DPTF
- device pci 05.0 on end # IPU
- device pci 06.0 on end # PEG60
- device pci 06.2 on end # PEG62
- device pci 07.0 on end # TBT_PCIe0
- device pci 07.1 on end # TBT_PCIe1
- device pci 07.2 on end # TBT_PCIe2
- device pci 07.3 on end # TBT_PCIe3
- device pci 08.0 off end # GNA
- device pci 09.0 off end # NPK
- device pci 0a.0 off end # Crash-log SRAM
- device pci 0d.0 on end # USB xHCI
- device pci 0d.1 on end # USB xDCI (OTG)
- device pci 0d.2 on end # TBT DMA0
- device pci 0d.3 on end # TBT DMA1
- device pci 0e.0 off end # VMD
- device pci 10.0 off end
- device pci 10.1 off end
- device pci 12.0 off end # SensorHUB
- device pci 12.6 off end # GSPI2
- device pci 13.0 off end # GSPI3
- device pci 14.0 on
+ end
+ device ref ipu on end
+ device ref pcie4_0 on end
+ device ref pcie4_1 on end
+ device ref tbt_pcie_rp0 on end
+ device ref tbt_pcie_rp1 on end
+ device ref tbt_pcie_rp2 on end
+ device ref tbt_pcie_rp3 on end
+ device ref crashlog off end
+ device ref tcss_xhci on end
+ device ref tcss_xdci on end
+ device ref tcss_dma0 on end
+ device ref tcss_dma1 on end
+ device ref xhci on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB"
- device usb 0.0 on
+ device ref xhci_root_hub on
chip drivers/usb/acpi
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
- device usb 2.9 on end
+ device ref usb2_port10 on end
end
end
end
- end # USB3.1 xHCI
- device pci 14.1 off end # USB3.1 xDCI
- device pci 14.2 off end # Shared RAM
- device pci 14.3 on
+ end
+ device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"
device generic 0 on end
end
- end # CNVi: WiFi
- device pci 15.0 on end # I2C0
- device pci 15.1 on end # I2C1
- device pci 15.2 on end # I2C2
- device pci 15.3 on end # I2C3
- device pci 16.0 on end # HECI1
- device pci 16.1 off end # HECI2
- device pci 16.2 off end # CSME
- device pci 16.3 off end # CSME
- device pci 16.4 off end # HECI3
- device pci 16.5 off end # HECI4
- device pci 17.0 on end # SATA
- device pci 19.0 off end # I2C4
- device pci 19.1 on end # I2C5
- device pci 19.2 off end # UART2
- device pci 1c.0 on end # RP1
- device pci 1c.1 off end # RP2
- device pci 1c.2 on end # RP3 # W/A to FSP issue
- device pci 1c.3 on end # RP4 # W/A to FSP issue
- device pci 1c.4 on end # RP5
- device pci 1c.5 on end # RP6
- device pci 1c.6 off end # RP7
- device pci 1c.7 on end # RP8
- device pci 1d.0 on end # RP9
- device pci 1d.1 off end # RP10
- device pci 1d.2 on end # RP11
- device pci 1d.3 off end # RP12
- device pci 1e.0 on end # UART0
- device pci 1e.1 off end # UART1
- device pci 1e.2 on end # GSPI0
- device pci 1e.3 off end # GSPI1
- device pci 1f.0 on end # eSPI
- device pci 1f.1 on end # P2SB
- device pci 1f.2 hidden end # PMC
- device pci 1f.3 on
+ end
+ device ref i2c0 on end
+ device ref i2c1 on end
+ device ref i2c2 on end
+ device ref i2c3 on end
+ device ref heci1 on end
+ device ref sata on end
+ device ref i2c5 on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp3 on end # W/A to FSP issue
+ device ref pcie_rp4 on end # W/A to FSP issue
+ device ref pcie_rp5 on end
+ device ref pcie_rp6 on end
+ device ref pcie_rp8 on end
+ device ref pcie_rp9 on end
+ device ref pcie_rp11 on end
+ device ref uart0 on end
+ device ref gspi0 on end
+ device ref p2sb on end
+ device ref hda on
chip drivers/intel/soundwire
device generic 0 on
chip drivers/soundwire/alc711
@@ -386,10 +360,7 @@ chip soc/intel/alderlake
end
end
end
- end # Intel Audio SNDW
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # SPI
- device pci 1f.6 off end # GbE
- device pci 1f.7 off end # TH
+ end
+ device ref smbus on end
end
end