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path: root/src/mainboard/intel/adlrvp/devicetree.cb
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* mb/intel/adlrvp: Enable Cr50 TPM over SPI for adlrvp_rplBora Guvendik2022-09-091-2/+23
* soc/intel/alderlake: Rename pcie5 aliasBora Guvendik2022-08-291-1/+1
* Revert "mb/intel/adlrvp: Set EPP to 45% for all Adl RVP variants"V Sowmya2022-08-211-4/+0
* mb/intel/adlrvp: disable unused root port 1, 3, 4 for Adl-P RVPCliff Huang2022-06-101-3/+0
* mb/intel/adlrvp: x4 slot support (SD card support) for Adl-P RVPCliff Huang2022-06-101-4/+6
* mb/intel/adlrvp: Set EPP to 45% for all Adl RVP variantsCliff Huang2022-03-181-0/+4
* soc/intel/adl/chip.h: Convert all camel case variables to snake caseMAULIK V VAGHELA2022-03-151-18/+18
* soc/intel/adl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-251-3/+0
* mb/google/brya/variants/*: Add cpu pcie rp flagsTracy Wu2022-01-171-0/+3
* mb/intel/adlrvp: Enable CPU PCIe RP 2Meera Ravindranath2021-11-191-0/+6
* mb/intel/adlrvp: Fix S0ix regressionMeera Ravindranath2021-11-171-21/+0
* mb/intel/adlrvp{p,m}: Enable dynamic GPIO PMMeera Ravindranath2021-10-041-10/+0
* mb/intel/adlrvp: Switch to using device pointersFurquan Shaikh2021-09-241-1/+1
* soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer2021-08-281-1/+0
* mb/intel/adlrvp: Enable SaGv supportV Sowmya2021-08-271-0/+3
* mb/intel/adlrvp: Use HDA TMODE 8T to match spec for ADL P RVPSathya Prakash M R2021-08-131-1/+1
* mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cbMAULIK V VAGHELA2021-08-101-2/+0
* mb/*/brya/adlrvp: Remove hardcoding of BSP APIC IDMAULIK V VAGHELA2021-08-101-3/+1
* mb/intel/adlrvp: Disable xDCI in devicetreeMonika A2021-07-151-1/+0
* mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ...Varshit B Pandya2021-07-051-3/+100
* mb/intel/adlrvp: Update the FIVR configurationsV Sowmya2021-07-051-0/+15
* soc/intel/alderlake/romstage: Update display UPDs based on InternalGfxSubrata Banik2021-06-161-2/+3
* soc/intel/adl: Add SKU specific power limits supportSumeet Pawnikar2021-06-071-5/+0
* mb/intel/adlrvp: Use device aliasesSubrata Banik2021-06-051-72/+43
* mb/intel/{adlrvp, sm}: Remove ADL-S devices from ADL-P/M devicetree.cbSubrata Banik2021-06-051-10/+0
* mb/intel/adlrvp: Enable DPTF functionality for adlrvp boardSumeet R Pawnikar2021-04-231-1/+101
* soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S2021-04-221-6/+3
* soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh2021-04-221-5/+0
* soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons2021-04-211-2/+0
* mb/*: drop LPC generic range for port 80Michael Niewöhner2021-04-121-1/+0
* mb/intel/adlrvp: Enable HECI1 communicationSridhar Siricilla2021-04-091-0/+3
* mb/intel/adlrvp: Allow GPIO PM override to disable dynamic GPIO PMSubrata Banik2021-03-271-0/+10
* mb/intel/adlrvp: Enable CnviBtAudioOffloadUsha P2021-03-241-0/+2
* mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flagCliff Huang2021-03-151-1/+3
* soc/intel/alderlake: Refactor PCIE port configEric Lai2021-02-051-28/+37
* soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQSubrata Banik2021-02-011-3/+0
* mb/intel/adlrvp: Remove unnecessary whitespaceSubrata Banik2021-01-301-14/+14
* mb/intel/adlrvp: Remove ClkReq assignment for RP8Subrata Banik2021-01-281-2/+0
* mb/intel/adlrvp: Fix FW download failed for PEG 060, 010Subrata Banik2021-01-101-2/+8
* soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik2021-01-101-7/+14
* mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8Subrata Banik2020-12-121-5/+5
* mb/intel/adlrvp: Replace tab by white space in devicetreeMeera Ravindranath2020-12-021-1/+1
* mainboard/intel/adlrvp: Enable PCH PCIe device over x1 slotSubrata Banik2020-12-011-1/+7
* mb/intel/adlrvp: Enable pre-boot display over HDMI-B portSubrata Banik2020-11-231-1/+3
* mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik2020-11-081-0/+274
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