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| author | Usha P <usha.p@intel.corp-partner.google.com> | 2021-02-23 17:56:46 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-24 07:52:48 +0000 |
| commit | f02fa4a1a8a8e96578f0909f2b5151f360832dd9 (patch) | |
| tree | 5a4b5e9b65564b590e80f3cac35efcd7af74a6d7 /src/mainboard/intel/adlrvp/devicetree.cb | |
| parent | 71c5ca764f6bbf85f61c92e6ac171f8bd4f126d3 (diff) | |
| download | coreboot-f02fa4a1a8a8e96578f0909f2b5151f360832dd9.tar.gz coreboot-f02fa4a1a8a8e96578f0909f2b5151f360832dd9.tar.bz2 coreboot-f02fa4a1a8a8e96578f0909f2b5151f360832dd9.zip | |
mb/intel/adlrvp: Enable CnviBtAudioOffload
This change enables CnviBtAudioOffload. FSP is invoked to configure
BT over USB and BT I2S pins for cAVS connection.
BUG=None
TEST=Verified BT offload working on ADL RVP
Signed-off-by: Usha P <usha.p@intel.corp-partner.google.com>
Change-Id: I1185a6c2295bae7d469be4da86502506adbeb8cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/devicetree.cb')
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index d0cb5f16ac4e..f78fe2c3ee06 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -173,6 +173,8 @@ chip soc/intel/alderlake # Not disconnected/enumerable register "PchHdaIDispCodecDisconnect" = "0" + register "CnviBtAudioOffload" = "true" + # Intel Common SoC Config register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, |