summaryrefslogtreecommitdiffstats
path: root/src/mainboard/intel/adlrvp
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-11-02 10:36:20 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-04-06 17:40:50 +0000
commit4fdd84e716bb052bfbae58366c687be2656a97bb (patch)
tree1bdd3c1bed7b16f61ce971a0a552400257e58f88 /src/mainboard/intel/adlrvp
parentafe5562ca39b26cc42ca04da55b68f73a7b70654 (diff)
downloadcoreboot-4fdd84e716bb052bfbae58366c687be2656a97bb.tar.gz
coreboot-4fdd84e716bb052bfbae58366c687be2656a97bb.tar.bz2
coreboot-4fdd84e716bb052bfbae58366c687be2656a97bb.zip
ChromeOS: Promote variant_cros_gpio()
The only purpose of mainboard_chromeos_acpi_generate() was to pass cros_gpio array for ACPI \\OIPG package generation. Promote variant_cros_gpio() from baseboards to ChromeOS declaration. Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp')
-rw-r--r--src/mainboard/intel/adlrvp/chromeos.c11
-rw-r--r--src/mainboard/intel/adlrvp/gpio_m.c2
-rw-r--r--src/mainboard/intel/adlrvp/gpio_n.c1
-rw-r--r--src/mainboard/intel/adlrvp/include/baseboard/variants.h4
4 files changed, 3 insertions, 15 deletions
diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c
index d7e55a91dc67..56fbc5057dab 100644
--- a/src/mainboard/intel/adlrvp/chromeos.c
+++ b/src/mainboard/intel/adlrvp/chromeos.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
-#include <baseboard/variants.h>
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include <types.h>
-#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
@@ -42,15 +40,6 @@ int get_write_protect_state(void)
return 0;
}
-void mainboard_chromeos_acpi_generate(void)
-{
- const struct cros_gpio *gpios;
- size_t num;
-
- gpios = variant_cros_gpios(&num);
- chromeos_acpi_gpio_generate(gpios, num);
-}
-
#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) ||\
CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC))
int get_ec_is_trusted(void)
diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c
index 62ae0f38c0d2..33b5a1dc3745 100644
--- a/src/mainboard/intel/adlrvp/gpio_m.c
+++ b/src/mainboard/intel/adlrvp/gpio_m.c
@@ -2,6 +2,8 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
+#include <commonlib/helpers.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/intel/adlrvp/gpio_n.c b/src/mainboard/intel/adlrvp/gpio_n.c
index 6f4e4a5987c9..364deaca2576 100644
--- a/src/mainboard/intel/adlrvp/gpio_n.c
+++ b/src/mainboard/intel/adlrvp/gpio_n.c
@@ -3,6 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/intel/adlrvp/include/baseboard/variants.h b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
index 143679ac5678..4ae10112cea5 100644
--- a/src/mainboard/intel/adlrvp/include/baseboard/variants.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
@@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
-#include <vendorcode/google/chromeos/chromeos.h>
enum adl_boardid {
/* ADL-P LPDDR4 RVPs */
@@ -28,9 +27,6 @@ enum adl_boardid {
ADL_N_LP5 = 0x7,
};
-/* The next set of functions return the gpio table and fill in the number of
- * entries for each table. */
-const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Functions to configure GPIO as per variant schematics */
void variant_configure_gpio_pads(void);
void variant_configure_early_gpio_pads(void);