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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-03-20 14:08:04 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-22 00:17:55 +0100 |
| commit | 3e4e3038584fb2055c482fd346bb821b3d6236fc (patch) | |
| tree | 6de73a59507af4ce7986f68918d97a080ddb8453 /src/mainboard/intel/baskingridge/chromeos.c | |
| parent | 93a6665e0cf29971b92550ff020b8c2f67c17202 (diff) | |
| download | coreboot-3e4e3038584fb2055c482fd346bb821b3d6236fc.tar.gz coreboot-3e4e3038584fb2055c482fd346bb821b3d6236fc.tar.bz2 coreboot-3e4e3038584fb2055c482fd346bb821b3d6236fc.zip | |
Unify coreboot table generation
coreboot tables are, unlike general system tables, a platform
independent concept. Hence, use the same code for coreboot table
generation on all platforms. lib/coreboot_tables.c is based
on the x86 version of the file, because some important fixes
were missed on the ARMv7 version lately.
Change-Id: Icc38baf609f10536a320d21ac64408bef44bb77d
Signed-off-by: Stefan Reinauer <reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/2863
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/baskingridge/chromeos.c')
| -rw-r--r-- | src/mainboard/intel/baskingridge/chromeos.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 5ec6c2790743..6bf5116c6415 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -27,7 +27,6 @@ #ifndef __PRE_RAM__ #include <boot/coreboot_tables.h> -#include <arch/coreboot_tables.h> #define GPIO_COUNT 6 #define ACTIVE_LOW 0 |