diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-16 16:34:21 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-17 21:09:38 +0000 |
| commit | 0c6dc828f649692f4fdb418078c3da6824582658 (patch) | |
| tree | 4583203a676db21b8d4961142ae773d82a96e292 /src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | |
| parent | 035c6c8559b0e1849c89555803075c37cd6c11b2 (diff) | |
| download | coreboot-0c6dc828f649692f4fdb418078c3da6824582658.tar.gz coreboot-0c6dc828f649692f4fdb418078c3da6824582658.tar.bz2 coreboot-0c6dc828f649692f4fdb418078c3da6824582658.zip | |
mainboard/**/devicetree.cb: Fix typo
repalcement ---> replacement
Change-Id: I486170e89f75fa7c01c7322bb8db783fd4f61931
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64404
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb')
| -rw-r--r-- | src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 21206946203b..fdd1a78a785d 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -53,7 +53,7 @@ chip soc/intel/jasperlake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - # Skip the CPU repalcement check + # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1" register "PchHdaDspEnable" = "1" |