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| author | Werner Zeh <werner.zeh@siemens.com> | 2022-12-22 10:23:55 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-12-23 15:56:50 +0000 |
| commit | 9d40a0be2fc7da66e328e380cfd17ffb76677ff2 (patch) | |
| tree | ceec2da08c2c5fd860e84e4c75587021c6655e0b /src/mainboard/siemens | |
| parent | a1a3be1df84fd76c9195dff182e77fe391101c7f (diff) | |
| download | coreboot-9d40a0be2fc7da66e328e380cfd17ffb76677ff2.tar.gz coreboot-9d40a0be2fc7da66e328e380cfd17ffb76677ff2.tar.bz2 coreboot-9d40a0be2fc7da66e328e380cfd17ffb76677ff2.zip | |
mb/siemens/mc_apl{4,7}: Limit I2C bus speed to 100 kHz on bus 7
Due to a high I2C bus load on the mainboard I2C frequency of 400 kHz
leads to poor signaling. Therefore limit the I2C speed to 100 kHz for
this bus. In addition, add a generic I2C device with 100 kHz bus speed
to the devicetree so that the OS will not switch to higher clock rates,
too.
Test= Measure the I2C signals at coreboot and OS runtime and ensure the
clock is always at 100 kHz.
Change-Id: I6b0a642cd3f5b77331663ac8c76ed0a116ae77ca
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71227
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/siemens')
4 files changed, 35 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig index 6f600c70be22..4942624ff1ed 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig @@ -3,6 +3,7 @@ if BOARD_SIEMENS_MC_APL4 config BOARD_SPECIFIC_OPTIONS def_bool y + select DRIVERS_I2C_GENERIC select DRIVER_INTEL_I210 select SOC_INTEL_SET_MIN_CLOCK_RATIO select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index c601106c5e04..f997d08433a6 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -38,6 +38,16 @@ chip soc/intel/apollolake # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "1" + # I2C7 controller used for PTN + register "common_soc_config" = "{ + .i2c[7] = { + .speed = I2C_SPEED_STANDARD, + .rise_time_ns = 210, + .fall_time_ns = 100, + .data_hold_time_ns = 300, + } + }" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF @@ -94,6 +104,13 @@ chip soc/intel/apollolake chip drivers/i2c/ptn3460 device i2c 0x60 on end # PTN3460 DP2LVDS Bridge end + # Add dummy I2C device to limit BUS speed to 100 kHz in OS + chip drivers/i2c/generic + register "hid" = ""PRP0001"" + register "speed" = "I2C_SPEED_STANDARD" + device i2c 0x7f on end + end + end device pci 18.0 on end # - UART 0 device pci 18.1 on end # - UART 1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/Kconfig index 953dcfd484a4..76abd138c1f0 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/Kconfig @@ -3,6 +3,7 @@ if BOARD_SIEMENS_MC_APL7 config BOARD_SPECIFIC_OPTIONS def_bool y + select DRIVERS_I2C_GENERIC select DRIVER_INTEL_I210 select SOC_INTEL_SET_MIN_CLOCK_RATIO select DRIVERS_I2C_PTN3460 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb index c879fef3edf6..b3775bd7a65b 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb @@ -38,6 +38,16 @@ chip soc/intel/apollolake # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "1" + # I2C7 controller used for PTN + register "common_soc_config" = "{ + .i2c[7] = { + .speed = I2C_SPEED_STANDARD, + .rise_time_ns = 210, + .fall_time_ns = 100, + .data_hold_time_ns = 300, + } + }" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF @@ -92,6 +102,12 @@ chip soc/intel/apollolake chip drivers/i2c/ptn3460 device i2c 0x60 on end # PTN3460 DP2LVDS Bridge end + # Add dummy I2C device to limit BUS speed to 100 kHz in OS + chip drivers/i2c/generic + register "hid" = ""PRP0001"" + register "speed" = "I2C_SPEED_STANDARD" + device i2c 0x7f on end + end end device pci 18.0 on end # - UART 0 device pci 18.1 on end # - UART 1 |