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| author | Myles Watson <mylesgw@gmail.com> | 2009-10-23 22:53:26 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-10-23 22:53:26 +0000 |
| commit | 036c15fe71c4ec69e4403e0957f6c84357177d49 (patch) | |
| tree | 9447dc64aba1ba9fdea2bb622454c80f6ea56314 /src/mainboard/sunw | |
| parent | c21b5ee58470c16b4f31578fe19d10e66cb914ad (diff) | |
| download | coreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.tar.gz coreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.tar.bz2 coreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.zip | |
Drop dead K8_SCAN_PCI_BUS code. It's a bad idea to scan the PCI busses before
RAM is initialized, and no one does it. Trivial.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/sunw')
| -rw-r--r-- | src/mainboard/sunw/ultra40/cache_as_ram_auto.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c index 18af54280975..468e04975076 100644 --- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c +++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c @@ -3,8 +3,6 @@ #define K8_ALLOCATE_IO_RANGE 1 -//#define K8_SCAN_PCI_BUS 1 - #define QRANK_DIMM_SUPPORT 1 |