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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-05-24 20:25:58 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-06-22 12:30:15 +0000 |
| commit | 27d6299d51744bda549b7764b8fde909ad812e33 (patch) | |
| tree | c30a57ff78e57c9c79a74c4b27cc6e5dfbc94a49 /src/northbridge/intel/gm45/northbridge.c | |
| parent | 37b161fb96c602765fef9f64415f809830b915a4 (diff) | |
| download | coreboot-27d6299d51744bda549b7764b8fde909ad812e33.tar.gz coreboot-27d6299d51744bda549b7764b8fde909ad812e33.tar.bz2 coreboot-27d6299d51744bda549b7764b8fde909ad812e33.zip | |
device/resource: Add _kb postfix for resource allocators
There is a lot of going back-and-forth with the KiB arguments, start
the work to migrate away from this.
Change-Id: I329864d36137e9a99b5640f4f504c45a02060a40
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64658
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 83039a8c818c..d2a8742660f8 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -103,7 +103,7 @@ static void mch_domain_read_resources(struct device *dev) printk(BIOS_INFO, "Available memory below 4GB: %uM\n", tomk >> 10); /* Report lowest memory region */ - ram_resource(dev, idx++, 0, 0xa0000 / KiB); + ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB); /* * Reserve everything between A segment and 1MB: @@ -111,11 +111,11 @@ static void mch_domain_read_resources(struct device *dev) * 0xa0000 - 0xbffff: Legacy VGA * 0xc0000 - 0xfffff: RAM */ - mmio_resource(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB); - reserved_ram_resource(dev, idx++, 0xc0000 / KiB, (1*MiB - 0xc0000) / KiB); + mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB); + reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, (1*MiB - 0xc0000) / KiB); /* Report < 4GB memory */ - ram_resource(dev, idx++, 1*MiB / KiB, tomk - 1*MiB / KiB); + ram_resource_kb(dev, idx++, 1*MiB / KiB, tomk - 1*MiB / KiB); /* * If >= 4GB installed then memory from TOLUD to 4GB @@ -123,15 +123,15 @@ static void mch_domain_read_resources(struct device *dev) */ touud >>= 10; /* Convert to KB */ if (touud > 4096 * 1024) { - ram_resource(dev, idx++, 4096 * 1024, touud - (4096 * 1024)); + ram_resource_kb(dev, idx++, 4096 * 1024, touud - (4096 * 1024)); printk(BIOS_INFO, "Available memory above 4GB: %lluM\n", (touud >> 10) - 4096); } printk(BIOS_DEBUG, "Adding UMA memory area base=0x%llx " "size=0x%llx\n", ((u64)tomk) << 10, ((u64)uma_sizek) << 10); - /* Don't use uma_resource() as our UMA touches the PCI hole. */ - fixed_mem_resource(dev, idx++, tomk, uma_sizek, IORESOURCE_RESERVE); + /* Don't use uma_resource_kb() as our UMA touches the PCI hole. */ + fixed_mem_resource_kb(dev, idx++, tomk, uma_sizek, IORESOURCE_RESERVE); mmconf_resource(dev, idx++); } |