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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-05-24 20:25:58 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-06-22 12:30:15 +0000 |
| commit | 27d6299d51744bda549b7764b8fde909ad812e33 (patch) | |
| tree | c30a57ff78e57c9c79a74c4b27cc6e5dfbc94a49 /src/northbridge/intel/haswell/northbridge.c | |
| parent | 37b161fb96c602765fef9f64415f809830b915a4 (diff) | |
| download | coreboot-27d6299d51744bda549b7764b8fde909ad812e33.tar.gz coreboot-27d6299d51744bda549b7764b8fde909ad812e33.tar.bz2 coreboot-27d6299d51744bda549b7764b8fde909ad812e33.zip | |
device/resource: Add _kb postfix for resource allocators
There is a lot of going back-and-forth with the KiB arguments, start
the work to migrate away from this.
Change-Id: I329864d36137e9a99b5640f4f504c45a02060a40
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64658
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 5e57f9d61823..606461b4e7df 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -287,13 +287,13 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) /* 0 - > 0xa0000 */ base_k = 0; size_k = (0xa0000 >> 10) - base_k; - ram_resource(dev, index++, base_k, size_k); + ram_resource_kb(dev, index++, base_k, size_k); /* 0xc0000 -> TSEG - DPR */ base_k = 0xc0000 >> 10; size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - base_k; size_k -= dpr.size * MiB / KiB; - ram_resource(dev, index++, base_k, size_k); + ram_resource_kb(dev, index++, base_k, size_k); /* TSEG - DPR -> BGSM */ resource = new_resource(dev, index++); @@ -316,15 +316,15 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) touud_k = mc_values[TOUUD_REG] >> 10; size_k = touud_k - base_k; if (touud_k > base_k) - ram_resource(dev, index++, base_k, size_k); + ram_resource_kb(dev, index++, base_k, size_k); /* Reserve everything between A segment and 1MB: * * 0xa0000 - 0xbffff: Legacy VGA * 0xc0000 - 0xfffff: RAM */ - mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10); - reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10); + mmio_resource_kb(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10); + reserved_ram_resource_kb(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10); *resource_cnt = index; } @@ -342,8 +342,8 @@ static void mc_read_resources(struct device *dev) /* Add VT-d MMIO resources, if capable */ if (vtd_capable) { - mmio_resource(dev, index++, GFXVT_BASE_ADDRESS / KiB, GFXVT_BASE_SIZE / KiB); - mmio_resource(dev, index++, VTVC0_BASE_ADDRESS / KiB, VTVC0_BASE_SIZE / KiB); + mmio_resource_kb(dev, index++, GFXVT_BASE_ADDRESS / KiB, GFXVT_BASE_SIZE / KiB); + mmio_resource_kb(dev, index++, VTVC0_BASE_ADDRESS / KiB, VTVC0_BASE_SIZE / KiB); } /* Calculate and add DRAM resources */ |