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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-11-15 20:11:12 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-25 15:03:39 +0000 |
| commit | dd96ab698757c6b6f05612d92f38088e8f7069e5 (patch) | |
| tree | 5baa8f55301af11b68a361a55aa6296675ab4806 /src/northbridge/intel/haswell/northbridge.c | |
| parent | c87814d750073ba89c2a88d8dcc6c7611952ddbc (diff) | |
| download | coreboot-dd96ab698757c6b6f05612d92f38088e8f7069e5.tar.gz coreboot-dd96ab698757c6b6f05612d92f38088e8f7069e5.tar.bz2 coreboot-dd96ab698757c6b6f05612d92f38088e8f7069e5.zip | |
cpu/intel/haswell: Move chip_ops to cpu cluster
The cpu cluster is always present and it's the proper device to contain
the settings that need to be applied to all cpus. This makes it possible
to remove the fake lapic from devicetrees.
Change-Id: Ic449b2df8036e8c02b5559cca6b2e7479a70a786
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59314
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index e11eb1cef332..bcb2a0b9ba18 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -536,7 +536,6 @@ static struct device_operations mc_ops = { .enable_resources = pci_dev_enable_resources, .init = northbridge_init, .final = northbridge_final, - .acpi_fill_ssdt = generate_cpu_entries, .ops_pci = &pci_dev_ops_pci, }; @@ -561,6 +560,7 @@ struct device_operations haswell_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, + .acpi_fill_ssdt = generate_cpu_entries, }; struct chip_operations northbridge_intel_haswell_ops = { |