summaryrefslogtreecommitdiffstats
path: root/src/northbridge/intel/i440bx/raminit.h
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-03-30 21:18:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-04-11 21:04:46 +0000
commit527b68219f57f61d1b3f5b50779d22b170ac0f96 (patch)
tree5444e3ce87172a230f89abd891006e9c6a2dd8ad /src/northbridge/intel/i440bx/raminit.h
parent544d7e2b9136adcf0e17c41447c9c13a31c9dae1 (diff)
downloadcoreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.tar.gz
coreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.tar.bz2
coreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.zip
sb/intel/x/smbus.c: Correct register access width
The register is 16 bits wide. Change-Id: I58d44a17613965e0a27aab5246dcdce68e1a8201 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/i440bx/raminit.h')
0 files changed, 0 insertions, 0 deletions