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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-04 13:50:14 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-08 09:44:56 +0000 |
| commit | ef20ecc92b59b6edc42c06856931a591e71452ac (patch) | |
| tree | 5194abaa9a81bc229010ccaa7c18e22e7494aa95 /src/northbridge/intel/pineview | |
| parent | 6f027ff28a9b1806343ea253aa04f850fab3e7fb (diff) | |
| download | coreboot-ef20ecc92b59b6edc42c06856931a591e71452ac.tar.gz coreboot-ef20ecc92b59b6edc42c06856931a591e71452ac.tar.bz2 coreboot-ef20ecc92b59b6edc42c06856931a591e71452ac.zip | |
nb/intel/{gm45,i945,pineview}: Use macro instead of GGC address
Change-Id: I233e835180fd445961b6deb74ea7afc2821c236e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28909
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/pineview')
| -rw-r--r-- | src/northbridge/intel/pineview/gma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c index eb67c659901f..e075ac136c8a 100644 --- a/src/northbridge/intel/pineview/gma.c +++ b/src/northbridge/intel/pineview/gma.c @@ -98,7 +98,7 @@ static void intel_gma_init(const struct northbridge_intel_pineview_config *info, gtt_setup(mmio); - pci_write_config16(vga, 0x52, 0x130); + pci_write_config16(vga, GGC, 0x130); /* Disable VGA. */ write32(mmio + VGACNTRL, VGA_DISP_DISABLE); |