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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-07 00:00:15 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-08 12:00:48 +0000 |
| commit | ceafcae0781482d00a66e8a00885fa70b8e62f49 (patch) | |
| tree | 9fbcd4b64fa6223ece860c4aa9114263da48aab7 /src/soc/amd/cezanne/Kconfig | |
| parent | 9bb6646a5739daea5f74f0fd6c5b61768f06f833 (diff) | |
| download | coreboot-ceafcae0781482d00a66e8a00885fa70b8e62f49.tar.gz coreboot-ceafcae0781482d00a66e8a00885fa70b8e62f49.tar.bz2 coreboot-ceafcae0781482d00a66e8a00885fa70b8e62f49.zip | |
soc/amd/cezanne/acpi: rework C state info table handling
Rework the way the C state info is generated before it gets passed to
acpigen_write_CST_package in generate_cpu_entries by separating the data
from the code. For this, the newly introduced common get_cstate_info
function is used. Separating the data from the code will eventually
allow moving generate_cpu_entries to the common AMD code.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id97fcb74ff3d48994a3181d9c31cbbeb5a76c60a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Kconfig')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index c73467a0eaee..747f095b07ad 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -32,6 +32,7 @@ config SOC_AMD_CEZANNE select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPI_ALIB select SOC_AMD_COMMON_BLOCK_ACPI_CPPC + select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE select SOC_AMD_COMMON_BLOCK_ACPI_GPIO select SOC_AMD_COMMON_BLOCK_ACPI_IVRS select SOC_AMD_COMMON_BLOCK_AOAC |