soc/amd/{common/vboot,cezanne}: Copy S0i3 verstage logs into cbmem

Now that SMM can write to CBMEM we can simply replay the transfer buffer
cbmem console to move it into the main cbmem console.

replay_transfer_buffer_cbmemc() relies on the EARLY_RAM linker symbols.
Since the SMM rmodule get linked with a different linker script than
bootblock/romstage it doesn't have access to these symbols. In order to
pass these symbols into SMM, we parse the bootblock.map file and
generate an early_ram.ld script. This script is then used when linking
SMM.

I replay the buffer in `smm_soc_early_init` because this call happens
before `console_init()`. `console_init()` prints the SMM header and we
want to append the verstage contents before printing the header to avoid
confusion.

BUG=b:221231786
TEST=Perform S0i3 cycles and verify PSP verstage logs now show up when
doing `cbmem -c`.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I64d33ccdee9863270cfbcaef5d7c614349bd895c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62402
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/src/soc/amd/cezanne/smihandler.c b/src/soc/amd/cezanne/smihandler.c
index 509a1d404aac..a149e57fa957 100644
--- a/src/soc/amd/cezanne/smihandler.c
+++ b/src/soc/amd/cezanne/smihandler.c
@@ -9,9 +9,11 @@
 #include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
+#include <console/cbmem_console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <elog.h>
+#include <soc/psp_transfer.h>
 #include <soc/smi.h>
 #include <soc/smu.h>
 #include <soc/southbridge.h>
@@ -150,3 +152,9 @@ void *get_smi_source_handler(int source)
 
 	return NULL;
 }
+
+void smm_soc_early_init(void)
+{
+	if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && __CBMEM_CONSOLE_ENABLE__)
+		replay_transfer_buffer_cbmemc();
+}