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| author | Raul E Rangel <rrangel@chromium.org> | 2021-04-02 10:55:27 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-04-05 16:38:23 +0000 |
| commit | 61ac1bc53022f3baa0e5a753bd75d639cb95718a (patch) | |
| tree | ddc0136343218a0c50635b0ec7465b2a9206ba7f /src/soc/amd/picasso/early_fch.c | |
| parent | c988d0516cd91c9d2d7c8ace8c958fc2226996cc (diff) | |
| download | coreboot-61ac1bc53022f3baa0e5a753bd75d639cb95718a.tar.gz coreboot-61ac1bc53022f3baa0e5a753bd75d639cb95718a.tar.bz2 coreboot-61ac1bc53022f3baa0e5a753bd75d639cb95718a.zip | |
soc/amd: Make espi_configure_decodes private
This is only ever called after espi_setup.
55861 - AMD System Peripheral Bus Overview also says that io ranges
should be configured before enabling the BUS_MASTER bit.
BUG=b:183524609
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I074e487d8768a578ee889a125b9948e3aa6c7269
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/picasso/early_fch.c')
| -rw-r--r-- | src/soc/amd/picasso/early_fch.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index 63e192fa7f46..5f47638e7ea5 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -77,8 +77,6 @@ void fch_early_init(void) if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING)) lpc_disable_spi_rom_sharing(); - if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) { + if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) espi_setup(); - espi_configure_decodes(); - } } |